+# SPDX-License-Identifier: GPL-2.0-or-later
+
#xscale ixp42x CPU
if { [info exists CHIPNAME] } {
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
# register constants for IXP42x SDRAM controller
# helper function to init SDRAM on IXP42x.
# SDRAM_CFG: one of IXP42X_SDRAM_xxx
-# REFRESH: refresh counter reload value (integer)
-# CASLAT: 2 or 3
+# REFRESH: refresh counter reload value (integer)
+# CASLAT: 2 or 3
proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
switch $CASLAT {
2 {
- set SDRAM_CFG [expr $SDRAM_CFG | $::IXP42x_SDRAM_CL2 ]
+ set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL2} ]
set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS2_CMD
}
3 {
- set SDRAM_CFG [expr $SDRAM_CFG | $::IXP42x_SDRAM_CL3 ]
+ set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL3} ]
set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS3_CMD
}
default { error [format "unsupported cas latency \"%s\" " $CASLAT] }
proc ixp42x_set_bigendian { } {
reg XSCALE_CTRL 0xF8
}
-