stlink: add reconfigurable speed support

[fw/openocd] / tcl / target / imx6.cfg

diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg
index 622261fe6cfd12e471df8f340e2009a1281eabbc..11c2134cd8a1d7e947c8c37c1e714fd24c0c09d5 100644 (file)
--- a/tcl/target/imx6.cfg
+++ b/tcl/target/imx6.cfg
@@ -21,16 +21,17 @@ jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
 
 # System JTAG Controller
 if { [info exists SJC_TAPID] } {
-        set _SJC_TAPID SJC_TAPID
+        set _SJC_TAPID $SJC_TAPID
 } else {
         set _SJC_TAPID 0x0191c01d
 }
 set _SJC_TAPID2 0x2191c01d
 set _SJC_TAPID3 0x2191e01d
+set _SJC_TAPID4 0x1191c01d
 
 jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
         -expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \
-        -expected-id $_SJC_TAPID3
+        -expected-id $_SJC_TAPID3 -expected-id $_SJC_TAPID4
 
 # GDB target: Cortex-A9, using DAP, configuring only one core
 # Base addresses of cores: