# imx31 config
#
-reset_config trst_and_srst srst_nogate
+reset_config trst_and_srst srst_gates_jtag
+
+adapter srst delay 5
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME imx31
+ set _CHIPNAME imx31
}
if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
+ set _ENDIAN $ENDIAN
} else {
- set _ENDIAN little
+ set _ENDIAN little
}
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07b3601d
}
-if { [info exists SDMATAPID ] } {
+if { [info exists SDMATAPID] } {
set _SDMATAPID $SDMATAPID
} else {
set _SDMATAPID 0x2190101d
}
-#========================================
-# The "system jtag controller"
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
- set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _SJCTAPID 0x2b900f0f
+ set _ETBTAPID 0x2b900f0f
}
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+
+#========================================
+
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
# The "SDMA" - <S>mart <DMA> controller debug tap
# Based on some IO pins - this can be disabled & removed
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
-proc power_restore {} { puts "Sensed power restore. No action." }
-proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+proc power_restore {} { echo "Sensed power restore. No action." }
+proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
+
+# trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
+etm config $_TARGETNAME 16 normal full etb
+etb config $_TARGETNAME $_CHIPNAME.etb