flash/stm32l4x: add support of STM32WL5x dual core

[fw/openocd] / tcl / target / imx28.cfg

diff --git a/tcl/target/imx28.cfg b/tcl/target/imx28.cfg
index 0cbedce409855e099d226f531ec6def110ef8814..1fea3fa37245b858b047b75510e98b9f62201f2e 100644 (file)
--- a/tcl/target/imx28.cfg
+++ b/tcl/target/imx28.cfg
@@ -4,7 +4,7 @@
 reset_config trst_and_srst
 
 #jtag nTRST and nSRST delay
-adapter_nsrst_delay 100
+adapter srst delay 100
 jtag_ntrst_delay 100
 
 if { [info exists CHIPNAME] } {
@@ -23,7 +23,7 @@ if { [info exists ENDIAN] } {
 # Note above there is 1 tap
 
 # The CPU tap
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x079264f3
@@ -33,6 +33,6 @@ jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C
 
 # Create the GDB Target.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 arm7_9 dcc_downloads enable