flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / imx.cfg

diff --git a/tcl/target/imx.cfg b/tcl/target/imx.cfg
index 547ec56cc472375a91ce5f06daccba38bb4caedb..d76f60e1c6de21a671e425a6cbb93358e1831811 100644 (file)
--- a/tcl/target/imx.cfg
+++ b/tcl/target/imx.cfg
@@ -1,16 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # utility fn's for Freescale i.MX series
 
-global TARGETNAME 
+global TARGETNAME
 set TARGETNAME $_TARGETNAME
 
 # rewrite commands of the form below to arm11 mcr...
 #      Data.Set c15:0x042f %long 0x40000015
 proc setc15 {regs value} {
-       global TARGETNAME 
+       global TARGETNAME
 
-       echo [format "set p15 0x%04x, 0x%08x" $regs $value] 
+       echo [format "set p15 0x%04x, 0x%08x" $regs $value]
 
-       arm mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value 
+       arm mcr 15 [expr {($regs>>12)&0x7}] [expr {($regs>>0)&0xf}] [expr {($regs>>4)&0xf}] [expr {($regs>>8)&0x7}] $value
 }
 
 
@@ -18,12 +20,12 @@ proc imx3x_reset {} {
        # this reset script comes from the Freescale PDK
        #
        # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX35PDK
-       
+
        echo "Target Setup: initialize DRAM controller and peripherals"
-       
+
 #      Data.Set c15:0x01 %long 0x00050078
        setc15 0x01 0x00050078
-       
+
        echo "configuring CP15 for enabling the peripheral bus"
 #      Data.Set c15:0x042f %long 0x40000015
        setc15 0x042f 0x40000015