tcl/target: add SPDX tag

[fw/openocd] / tcl / target / hi6220.cfg

diff --git a/tcl/target/hi6220.cfg b/tcl/target/hi6220.cfg
index c2feb0b36b72b5ab152a0b5bc5de1688687cae08..f5f7fc9a49a450b47c1311298f31101f6fc18adc 100644 (file)
--- a/tcl/target/hi6220.cfg
+++ b/tcl/target/hi6220.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Hisilicon Hi6220 Target
 
 if { [info exists CHIPNAME] } {
@@ -37,7 +39,7 @@ set $_TARGETNAME.cti(7) 0x801DB000
 set _cores 8
 for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
 
-    cti create cti$_core -dap $_CHIPNAME.dap -ctibase [set $_TARGETNAME.cti($_core)] -ap-num 0
+    cti create cti$_core -dap $_CHIPNAME.dap -baseaddr [set $_TARGETNAME.cti($_core)] -ap-num 0
 
     set _command "target create ${_TARGETNAME}$_core aarch64 \
                          -dap $_CHIPNAME.dap -coreid $_core -cti cti$_core"
@@ -57,7 +59,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
 
 eval $_smp_command
 
-cti create cti.sys -dap $_CHIPNAME.dap -ap-num 0 -ctibase 0x80003000
+cti create cti.sys -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0x80003000
 
 # declare the auxiliary Cortex-M3 core on AP #2 (runs mcuimage.bin)
 target create ${_TARGETNAME}.m3 cortex_m -dap $_CHIPNAME.dap -ap-num 2 -defer-examine