flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / feroceon.cfg

diff --git a/tcl/target/feroceon.cfg b/tcl/target/feroceon.cfg
index e90165b4d64b74570b3acc6e45fe71e88fca4315..593569d1dd15933a8629562fe94580f8e7e1dcc9 100644 (file)
--- a/tcl/target/feroceon.cfg
+++ b/tcl/target/feroceon.cfg
@@ -1,20 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 ######################################
 # Target:    Marvell Feroceon CPU core
 ######################################
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME feroceon
+   set _CHIPNAME feroceon
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x20a023d3
@@ -26,6 +28,5 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
-adapter_nsrst_delay 200
+adapter srst delay 200
 jtag_ntrst_delay 200
-