--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The ESP32 only supports JTAG.
+transport select jtag
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME esp32
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x120034e5
+}
+
+if { [info exists ESP32_ONLYCPU] } {
+ set _ONLYCPU $ESP32_ONLYCPU
+} else {
+ set _ONLYCPU 2
+}
+
+if { [info exists ESP32_FLASH_VOLTAGE] } {
+ set _FLASH_VOLTAGE $ESP32_FLASH_VOLTAGE
+} else {
+ set _FLASH_VOLTAGE 3.3
+}
+
+set _CPU0NAME cpu0
+set _CPU1NAME cpu1
+set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
+set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
+
+jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
+if { $_ONLYCPU != 1 } {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
+} else {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
+}
+
+# PRO-CPU
+target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
+# APP-CPU
+if { $_ONLYCPU != 1 } {
+ target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
+$_TARGETNAME_0 esp32 flashbootstrap $_FLASH_VOLTAGE
+$_TARGETNAME_0 xtensa maskisr on
+$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
+
+$_TARGETNAME_0 configure -event gdb-attach {
+ $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+}
+
+if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event gdb-attach {
+ $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+ }
+ $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
+}
+
+gdb_breakpoint_override hard