target/imx7: Add ahb mem_ap

[fw/openocd] / tcl / target / dsp568013.cfg

diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg
index fa7c4d95126789ff47f89c8445fc37075f456507..0c491fa959cc03eb9edc9061714ead73593ebb6f 100644 (file)
--- a/tcl/target/dsp568013.cfg
+++ b/tcl/target/dsp568013.cfg
@@ -1,22 +1,21 @@
 # Script for freescale DSP568013
 
 if { [info exists CHIPNAME] } {        
-   set  _CHIPNAME $CHIPNAME    
-} else {        
-   set  _CHIPNAME dsp568013
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME dsp568013
 }
 
 if { [info exists ENDIAN] } {  
-   set  _ENDIAN $ENDIAN    
-} else {        
+   set _ENDIAN $ENDIAN
+} else {
   # this defaults to a big endian
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
    set _CPUTAPID 0x01f2401d
 }
 
@@ -36,7 +35,11 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # Setup the interesting tap
-jtag configure $_CHIPNAME.chp -event setup "jtag tapenable $_TARGETNAME"
+# Disable polling to be able to get idcode from core tap. If re enabled, can be re enabled, but it should be disabled to correctly unlock flash (operations requiere certain instruction to be in the IR register during reset, and polling would change this)
+jtag configure $_CHIPNAME.chp -event setup "
+     jtag tapenable $_TARGETNAME
+     poll off
+"
 
 #select CORE tap by modifying the TLM register.
 #to be used when MASTER tap is selected.
@@ -57,11 +60,11 @@ jtag configure $_CHIPNAME.chp -event tap-enable "
 #disables the master tap
 jtag configure $_TARGETNAME -event tap-disable "
 "
-#TODO FIND  SMARTER WAY.
+#TODO FIND SMARTER WAY.
 
 jtag configure $_CHIPNAME.chp -event tap-disable "
 "
-#TODO FIND  SMARTER WAY.
+#TODO FIND SMARTER WAY.
 
 
 #working area at base of ram