tcl/target: add SPDX tag

[fw/openocd] / tcl / target / c100.cfg

diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg
index a0a28d80a2d4f0603612a06f805e77b9e22dc623..c268ba3ba20b6d6d54a8171a8dd8224fbcbe7aa5 100644 (file)
--- a/tcl/target/c100.cfg
+++ b/tcl/target/c100.cfg
@@ -1,29 +1,31 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # c100 config.
 # This is ARM1136 dual core
 # this script only configures one core (that is used to run Linux)
 
 # assume no PLL lock, start slowly
-jtag_khz 100
+adapter speed 100
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME c100
+   set _CHIPNAME c100
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x27b3645b
 }
 
-if { [info exists DSPTAPID ] } {
+if { [info exists DSPTAPID] } {
    set _DSPTAPID $DSPTAPID
 } else {
    set _DSPTAPID 0x27b3645b
@@ -35,7 +37,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D
 # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # C100's ARAM 64k SRAM