+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Atheros AR9331 is a highly integrated and cost effective
# IEEE 802.11n 1x1 2.4 GHz System- on-a-Chip (SoC) for wireless
# local area network (WLAN) AP and router platforms.
# For SRST based variant we still need proper timings.
# For ETH part the reset should be asserted at least for 10ms
# Since there is no other information let's take 100ms to be sure.
-adapter_nsrst_assert_width 100
+adapter srst pulse_width 100
# according to the SoC documentation it should take at least 5ms from
# reset end till bootstrap end. In the practice we need 8ms to get JTAG back
# to live.
-adapter_nsrst_delay 8
+adapter srst delay 8
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME