tcl/stm32wlx.cfg: comply with new jimtcl expr syntax

[fw/openocd] / tcl / target / atheros_ar9331.cfg

diff --git a/tcl/target/atheros_ar9331.cfg b/tcl/target/atheros_ar9331.cfg
index bea37ed3c78587f13520e88b0ee290ccc93ada72..6ab238c8815b4af5e55bb3e6ff8741e376912aeb 100644 (file)
--- a/tcl/target/atheros_ar9331.cfg
+++ b/tcl/target/atheros_ar9331.cfg
@@ -41,12 +41,12 @@ reset_config none srst_pulls_trst
 # For SRST based variant we still need proper timings.
 # For ETH part the reset should be asserted at least for 10ms
 # Since there is no other information let's take 100ms to be sure.
-adapter_nsrst_assert_width 100
+adapter srst pulse_width 100
 
 # according to the SoC documentation it should take at least 5ms from
 # reset end till bootstrap end. In the practice we need 8ms to get JTAG back
 # to live.
-adapter_nsrst_delay 8
+adapter srst delay 8
 
 if { [info exists CHIPNAME] } {
        set _CHIPNAME $_CHIPNAME