tcl/board/arty_s7: Fix proc and chip name

[fw/openocd] / tcl / target / at91samdXX.cfg

diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
index 9a3c29282aa8fa5f29a380e5f5cfe9519549cc2b..9a396fa139806abee8d6e0d7275a52086724c9b7 100644 (file)
--- a/tcl/target/at91samdXX.cfg
+++ b/tcl/target/at91samdXX.cfg
@@ -34,9 +34,10 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -50,7 +51,8 @@ $_TARGETNAME configure -event reset-deassert-post {
 }
 
 # SRST (wired to RESET_N) resets debug circuitry
-reset_config srst_gates_jtag srst_pulls_trst
+# srst_pulls_trst is not configured here to avoid an error raised in reset halt
+reset_config srst_gates_jtag
 
 # Do not use a reset button with other SWD adapter than Atmel's EDBG.
 # DSU usually locks MCU in reset state until you issue a reset command
@@ -64,12 +66,12 @@ reset_config srst_gates_jtag srst_pulls_trst
 # This limit is most probably imposed by incorrectly handled SWD WAIT
 # on some SWD adapters.
 
-adapter_khz 400
+adapter speed 400
 
 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
 # without problem at maximal clock speed. Atmel recommends
 # adapter speed less than 10 * CPU clock.
-# adapter_khz 5000
+# adapter speed 5000
 
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to