tcl/target: add SPDX tag

[fw/openocd] / tcl / target / at91samdXX.cfg

diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
index 50d93f59035a367a7f8275d83e020443bac760ca..5132109ba8d7b570f951d957855aa935250e2835 100644 (file)
--- a/tcl/target/at91samdXX.cfg
+++ b/tcl/target/at91samdXX.cfg
@@ -1,5 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
-# script for Atmel SAMD, SAMR, SAML or SAMC, a CORTEX-M0 chip
+# script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
 #
 
 #
@@ -34,9 +36,10 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -53,11 +56,6 @@ $_TARGETNAME configure -event reset-deassert-post {
 # srst_pulls_trst is not configured here to avoid an error raised in reset halt
 reset_config srst_gates_jtag
 
-# Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) cannot
-# stop the MCU before it starts executing code if hardware RESETN
-# line is configured by command "reset_config srst_only"
-# Use "reset_config none" (default) before flash programming.
-
 # Do not use a reset button with other SWD adapter than Atmel's EDBG.
 # DSU usually locks MCU in reset state until you issue a reset command
 # in OpenOCD.
@@ -70,12 +68,12 @@ reset_config srst_gates_jtag
 # This limit is most probably imposed by incorrectly handled SWD WAIT
 # on some SWD adapters.
 
-adapter_khz 400
+adapter speed 400
 
 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
 # without problem at maximal clock speed. Atmel recommends
 # adapter speed less than 10 * CPU clock.
-# adapter_khz 5000
+# adapter speed 5000
 
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to