-jtag_rclk 4
+# SPDX-License-Identifier: GPL-2.0-or-later
######################################
# Target: Atmel AT91SAM9260
######################################
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME at91sam9260
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- # force an error till we get a good number
- set _CPUTAPID 0x0792603f
-}
+source [find target/at91sam9261.cfg]
reset_config trst_and_srst
+adapter speed 4
-adapter_nsrst_delay 200
+adapter srst delay 200
jtag_ntrst_delay 200
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-
-######################
-# Target configuration
-######################
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
-
-# Internal sram1 memory
-$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
-
scan_chain
$_TARGETNAME configure -event reset-start {
# at reset chip runs at 32khz
- jtag_rclk 8
+ adapter speed 8
}
$_TARGETNAME configure -event reset-init {at91sam_init}
# Faster memory downloads. This is disabled automatically during
# reset init since all reset init sequences are too short for
# fast memory access
-arm7_9 dcc_downloads enable
+arm7_9 dcc_downloads enable
arm7_9 fast_memory_access enable
proc at91sam_init { } {
sleep 10 ;# wait 10 ms
# Now run at anything fast... ie: 10mhz!
- jtag_rclk 10000 ;# Increase JTAG Speed to 6 MHz
+ adapter speed 10000 ;# Increase JTAG Speed to 6 MHz
mww 0xffffec00 0x0a0a0a0a ;# SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
mww 0xffffec04 0x0b0b0b0b ;# SMC_PULSE0