flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / at91sam9260.cfg

diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index df08d10d63d2ab7a727b8833c502b357814cfb48..3f74d96d84d80ac6b0b11e506ad80851bb2408a1 100644 (file)
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -1,44 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 ######################################
 # Target:    Atmel AT91SAM9260
 ######################################
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
-} else {
-   set  _CHIPNAME at91sam9260
-}
-
-if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
-} else {
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
+       set AT91_CHIPNAME $CHIPNAME
 } else {
-  # force an error till we get a good number
-   set _CPUTAPID 0x0792603f
+       set AT91_CHIPNAME at91sam9260
 }
 
-reset_config trst_and_srst separate trst_push_pull srst_open_drain
-
-#
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-jtag_nsrst_delay 300
-jtag_ntrst_delay 200
+source [find target/at91sam9.cfg]
 
-jtag_rclk 3
 
-######################
-# Target configuration
-######################
+# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc.  The
+# AT91SAM9260 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
+# Both areas are 4 kB long.
 
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
-
-# Internal sram1 memory
+#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x1000 -work-area-backup 1
 $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
-
-