# Datasheet does not specify SYSCLK to JTAG/SWD clock ratio.
# Usually used SYSCLK/6 is hell slow, testing shows that debugging can work @ SYSCLK/2
# but your mileage may vary.
-adapter_khz 50
+adapter speed 50
# System RC oscillator RCSYS starts in 3 cycles
-adapter_nsrst_delay 0
+adapter srst delay 0