Make the Atmel SAM3 family SWD-aware

[fw/openocd] / tcl / target / at91sam3XXX.cfg

diff --git a/tcl/target/at91sam3XXX.cfg b/tcl/target/at91sam3XXX.cfg
index a13e39901368f74464790ee7f17c559d86bf0d60..f36475b6d46ec754397167f294a13644f9f96af0 100644 (file)
--- a/tcl/target/at91sam3XXX.cfg
+++ b/tcl/target/at91sam3XXX.cfg
@@ -16,6 +16,16 @@
 # at91sam3s1c
 # at91sam3s1b
 # at91sam3s1a
+#
+# at91sam3A4C
+# at91sam3A8C
+# at91sam3X4C
+# at91sam3X4E
+# at91sam3X8C
+# at91sam3X8E
+# at91sam3X8H
+
+source [find target/swj-dp.tcl]
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -29,6 +39,14 @@ if { [info exists ENDIAN] } {
    set _ENDIAN little
 }
 
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x4000
+}
+
 #jtag scan chain
 if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
@@ -36,14 +54,32 @@ if { [info exists CPUTAPID] } {
    set _CPUTAPID 0x4ba00477
 }
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # 16K is plenty, the smallest chip has this much
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 $_TARGETNAME configure -event gdb-flash-erase-start {
     halt
 }
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter_khz 500
+
+adapter_nsrst_delay 100
+if {$using_jtag} {
+   jtag_ntrst_delay 100
+}
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq