tcl/target: add SPDX tag

[fw/openocd] / tcl / target / at91sam3XXX.cfg

diff --git a/tcl/target/at91sam3XXX.cfg b/tcl/target/at91sam3XXX.cfg
index 63759e3f5a67d90888c2ea99ef215468801c775f..ba1c3c563eec941a3f6cbe220ed78fcbda4a0b05 100644 (file)
--- a/tcl/target/at91sam3XXX.cfg
+++ b/tcl/target/at91sam3XXX.cfg
@@ -1,4 +1,6 @@
-# script for ATMEL sam3, a CORTEX-M3 chip
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for ATMEL sam3, a Cortex-M3 chip
 #
 # at91sam3u4e
 # at91sam3u2e
@@ -24,6 +26,9 @@
 # at91sam3X8C
 # at91sam3X8E
 # at91sam3X8H
+
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
@@ -36,17 +41,13 @@ if { [info exists ENDIAN] } {
    set _ENDIAN little
 }
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
-#
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
-
-adapter_khz 500
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x4000
+}
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
@@ -55,14 +56,35 @@ if { [info exists CPUTAPID] } {
    set _CPUTAPID 0x4ba00477
 }
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 # 16K is plenty, the smallest chip has this much
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 $_TARGETNAME configure -event gdb-flash-erase-start {
     halt
 }
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter speed 500
+
+adapter srst delay 100
+if {[using_jtag]} {
+   jtag_ntrst_delay 100
+}
+
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}