eMAG: Add Ampere eMAG config files

[fw/openocd] / tcl / target / ampere_emag.cfg

diff --git a/tcl/target/ampere_emag.cfg b/tcl/target/ampere_emag.cfg
new file mode 100644 (file)
index 0000000..7115a83
--- /dev/null
+++ b/tcl/target/ampere_emag.cfg
@@ -0,0 +1,112 @@
+#
+# OpenOCD Target Configuration for eMAG ARMv8 Processor
+#
+# Copyright (c) 2019-2021, Ampere Computing LLC
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program;
+#
+#
+
+#
+# Configure defaults for target
+# Can be overriden in board configuration file
+#
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME emag
+}
+
+if { [info exists NUMCORES] } {
+       set _NUMCORES $NUMCORES
+} else {
+       set _NUMCORES 32
+}
+
+if { [info exists ENDIAN] } {
+       set _ENDIAN $ENDIAN
+} else {
+       set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+       set _CPUTAPID $CPUTAPID
+} else {
+       set _CPUTAPID 0x4BA00477
+}
+
+#
+# Configure JTAG TAP
+#
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID
+set _TAPNAME $_CHIPNAME.cpu
+
+set _DAPNAME ${_TAPNAME}_dap
+set _APNUM 1
+dap create $_DAPNAME -chain-position $_TAPNAME
+$_DAPNAME apsel $_APNUM
+
+# Create the DAP AP0 MEM-AP AHB-AP target
+target create AHB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 0
+
+# Create the DAP AP1 MEM-AP APB-AP target
+target create APB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 1
+
+#
+# Configure target CPUs
+#
+
+# Build string used to enable smp mode
+set _SMP_STR "target smp"
+
+for {set _i 0} {$_i < $_NUMCORES} {incr _i} {
+       # Format a string to reference which CPU target to use
+       set _TARGETNAME [format "${_TAPNAME}_%02d" $_i]
+
+       # Create and configure Cross Trigger Interface (CTI) - required for halt and resume
+       set _CTINAME $_TARGETNAME.cti
+       cti create $_CTINAME -dap $_DAPNAME -ap-num $_APNUM -baseaddr [expr 0xFC020000 + ($_i << 20)]
+
+       # Create the target
+       target create $_TARGETNAME aarch64 -endian $_ENDIAN -dap $_DAPNAME -ap-num $_APNUM -cti $_CTINAME -coreid $_i
+       set _SMP_STR "$_SMP_STR $_TARGETNAME"
+
+       # Clear CTI output/input enables that are not configured by OpenOCD for aarch64
+       $_TARGETNAME configure -event examine-start [subst {
+               $_CTINAME write INEN0 0x00000000
+               $_CTINAME write INEN1 0x00000000
+               $_CTINAME write INEN2 0x00000000
+               $_CTINAME write INEN3 0x00000000
+               $_CTINAME write INEN4 0x00000000
+               $_CTINAME write INEN5 0x00000000
+               $_CTINAME write INEN6 0x00000000
+               $_CTINAME write INEN7 0x00000000
+               $_CTINAME write INEN8 0x00000000
+
+               $_CTINAME write OUTEN2 0x00000000
+               $_CTINAME write OUTEN3 0x00000000
+               $_CTINAME write OUTEN4 0x00000000
+               $_CTINAME write OUTEN5 0x00000000
+               $_CTINAME write OUTEN6 0x00000000
+               $_CTINAME write OUTEN7 0x00000000
+               $_CTINAME write OUTEN8 0x00000000
+       }]
+
+       # Enable OpenOCD HWTHREAD RTOS feature for GDB thread (CPU) selection support
+       # This feature presents CPU cores ("hardware threads") in an SMP system as threads to GDB
+       $_TARGETNAME configure -rtos hwthread
+}
+eval $_SMP_STR