# Empty body to make sure this executes as fast as possible.
# We don't want any delays here otherwise romcode might start
# executing and end up changing state of certain IPs.
- while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+ while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
- while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+ while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
}
}
proc vtp_enable { } {
global VTP_CTRL_REG
- set vtp [ expr [ mrw $VTP_CTRL_REG ] | 0x40 ]
+ set vtp [ expr {[ mrw $VTP_CTRL_REG ] | 0x40 }]
mww $VTP_CTRL_REG $vtp
- set vtp [ expr [ mrw $VTP_CTRL_REG ] & ~0x01 ]
+ set vtp [ expr {[ mrw $VTP_CTRL_REG ] & ~0x01 }]
mww $VTP_CTRL_REG $vtp
- set vtp [ expr [ mrw $VTP_CTRL_REG ] | 0x01 ]
+ set vtp [ expr {[ mrw $VTP_CTRL_REG ] | 0x01 }]
mww $VTP_CTRL_REG $vtp
}
emif_prcm_clk_enable
vtp_enable
- set dll [ expr [ mrw $CM_DLL_CTRL ] & ~0x01 ]
+ set dll [ expr {[ mrw $CM_DLL_CTRL ] & ~0x01 }]
mww $CM_DLL_CTRL $dll
while { !([ mrw $CM_DLL_CTRL ] & 0x04) } { }
sleep 10
- set tmp [ expr [ mrw $EXT_PHY_CTRL_36 ] | 0x0100 ]
+ set tmp [ expr {[ mrw $EXT_PHY_CTRL_36 ] | 0x0100 }]
mww $EXT_PHY_CTRL_36 $tmp
mww $EXT_PHY_CTRL_36_SHDW $tmp