flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / am335x.cfg

diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg
index 02d8c7e82e307ab1adb0e84fa21a09c40f5f1ba1..208ebf5610869b50e598e64c867349832ce213e6 100644 (file)
--- a/tcl/target/am335x.cfg
+++ b/tcl/target/am335x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find target/icepick.cfg]
 
 if { [info exists CHIPNAME] } {
@@ -85,8 +87,8 @@ $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
 # FIXME: unify with target/am437x.cfg
 source [find mem_helper.tcl]
 set  WDT1_BASE_ADDR                  0x44e35000
-set  WDT1_W_PEND_WSPR                [expr       $WDT1_BASE_ADDR     +  0x0034]
-set  WDT1_WSPR                       [expr       $WDT1_BASE_ADDR     +  0x0048]
+set  WDT1_W_PEND_WSPR                [expr       {$WDT1_BASE_ADDR     +  0x0034}]
+set  WDT1_WSPR                       [expr       {$WDT1_BASE_ADDR     +  0x0048}]
 proc disable_watchdog { } {
        global WDT1_WSPR
        global WDT1_W_PEND_WSPR
@@ -103,10 +105,10 @@ proc disable_watchdog { } {
                # Empty body to make sure this executes as fast as possible.
                # We don't want any delays here otherwise romcode might start
                # executing and end up changing state of certain IPs.
-               while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+               while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
 
                mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
-               while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+               while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
        }
 }
 $_TARGETNAME configure -event reset-end { disable_watchdog }