tcl/target: add SPDX tag

[fw/openocd] / tcl / target / adsp-sc58x.cfg

diff --git a/tcl/target/adsp-sc58x.cfg b/tcl/target/adsp-sc58x.cfg
index e2b695215f82f9106fcc34e098e0e221e7c7ce8c..3dcfc91f35538c59763bf8c8cd9f58e321a05d29 100644 (file)
--- a/tcl/target/adsp-sc58x.cfg
+++ b/tcl/target/adsp-sc58x.cfg
@@ -1,11 +1,19 @@
-# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
+# SPDX-License-Identifier: GPL-2.0-or-later
 
-# evaluation boards by Analog Devices (and designs derived from them) use a non-standard 10-pin 0.05" ARM Cortex Debug Connector
-# pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST
-# as a result, a standards-compliant debug pod will only force the processor's debug interface into reset, preventing usage
-# so, a connector adapter must be employed on these boards to isolate or otherwise prevent /TRST from being asserted
+#
+# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
+#
+
+# Evaluation boards by Analog Devices (and designs derived from them) use a
+# non-standard 10-pin 0.05" ARM Cortex Debug Connector.  In this bastardized
+# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
+#
+# As a result, a standards-compliant debug pod will force /TRST active,
+# putting the processor's debug interface into reset and preventing usage.
+#
+# A connector adapter must be employed on these boards to isolate or remap
+# /TRST so that it is only asserted when intended.
 
-transport select swd
 source [find target/swj-dp.tcl]
 
 if { [info exists CHIPNAME] } {
@@ -26,21 +34,21 @@ if { [info exists CPUTAPID] } {
        set _CPUTAPID 0x3BA02477
 }
 
-swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
+target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
+
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -event examine-end {
    global _TARGETNAME
-   sc58x_enabledebug $_TARGETNAME
+   sc58x_enabledebug
 }
 
-proc sc58x_enabledebug {target} {
-   # Enable debugging functionality by setting relevant bits in the TAPC_DBGCTL register
-   # the "phys" option is critical; the OpenOCD Cortex-A target code prevents normal mww when the target is not halted
-   # however, it is not possible to halt the target unless these register bits have been set
-   $target mww phys 0x31131000 0xFFFF
+proc sc58x_enabledebug {} {
+   # Enable debugging functionality by setting bits in the TAPC_DBGCTL register
+   # it is not possible to halt the target unless these bits have been set
+   ap0.mem mww 0x31131000 0xFFFF
 }
-