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pipistrello: decrease jtag speed to 10 MHz
[fw/openocd]
/
tcl
/
interface
/
ftdi
/
pipistrello.cfg
diff --git
a/tcl/interface/ftdi/pipistrello.cfg
b/tcl/interface/ftdi/pipistrello.cfg
index b51405a2d8107e94920b116cf4eaabc42a212e4a..5ee5be5bb2c70a14c5c7b5c468fec2c010a800cf 100644
(file)
--- a/
tcl/interface/ftdi/pipistrello.cfg
+++ b/
tcl/interface/ftdi/pipistrello.cfg
@@
-10,4
+10,4
@@
ftdi_layout_init 0x0008 0x000b
reset_config none
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
-adapter_khz
3
0000
+adapter_khz
1
0000