tcl: add SPDX tag

[fw/openocd] / tcl / fpga / xilinx-xadc.cfg

diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index 38691045c9dace4c25b44f5c91e8d408e6b4cadd..fdaf3a961bbe7bed66b58108d41fbaa58d8d90ce 100644 (file)
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Xilinx XADC support for 7 Series FPGAs
 #
 # The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
@@ -5,7 +7,7 @@
 # voltages. The XADC is available both from fabric as well as through the
 # JTAG TAP.
 #
-# This code implements access throught the JTAG TAP.
+# This code implements access through the JTAG TAP.
 #
 # https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf
 
@@ -16,7 +18,7 @@ proc xadc_cmd {cmd addr data} {
                READ 0x01
                WRITE 0x02
        }
-       return [expr ($cmds($cmd) << 26) | ($addr << 16) | ($data << 0)]
+       return [expr {($cmds($cmd) << 26) | ($addr << 16) | ($data << 0)}]
 }
 
 # XADC register addresses
@@ -101,7 +103,7 @@ proc xadc_select {tap} {
 proc xadc_xfer {tap cmd addr data} {
        set ret [drscan $tap 32 [xadc_cmd $cmd $addr $data]]
        runtest 10
-       return [expr 0x$ret]
+       return [expr "0x$ret"]
 }
 
 # XADC register write
@@ -118,17 +120,17 @@ proc xadc_read {tap addr} {
 # convert 16 bit register code from ADC measurement on
 # external voltages (VAUX) to Volt
 proc xadc_volt {code} {
-       return [expr $code * 1./(1 << 16)]
+       return [expr {$code * 1./(1 << 16)}]
 }
 
 # convert 16 bit temperature measurement to Celsius
 proc xadc_temp {code} {
-       return [expr $code * 503.975/(1 << 16) - 273.15]
+       return [expr {$code * 503.975/(1 << 16) - 273.15}]
 }
 
 # convert 16 bit suppply voltage measurement to Volt
 proc xadc_sup {code} {
-       return [expr $code * 3./(1 << 16)]
+       return [expr {$code * 3./(1 << 16)}]
 }
 
 # perform a single channel measurement using default settings