tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

[fw/openocd] / tcl / chip / atmel / at91 / at91sam9_init.cfg

diff --git a/tcl/chip/atmel/at91/at91sam9_init.cfg b/tcl/chip/atmel/at91/at91sam9_init.cfg
index 2d78d241db42a4805060c36848d61b42ec6ede1c..688cb1f4c4d4a779faf12fbb82bc3e279f35c467 100644 (file)
--- a/tcl/chip/atmel/at91/at91sam9_init.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_init.cfg
@@ -12,8 +12,8 @@ proc at91sam9_reset_start { } {
        halt
        wait_halt 10000
        set rstc_mr_val [expr $::AT91_RSTC_KEY]
-       set rstc_mr_val [expr ($rstc_mr_val | (5 << 8))]
-       set rstc_mr_val [expr ($rstc_mr_val | $::AT91_RSTC_URSTEN)]
+       set rstc_mr_val [expr {$rstc_mr_val | (5 << 8)}]
+       set rstc_mr_val [expr {$rstc_mr_val | $::AT91_RSTC_URSTEN}]
        mww $::AT91_RSTC_MR $rstc_mr_val        ;# RSTC_MR : enable user reset.
 }
 
@@ -21,14 +21,14 @@ proc at91sam9_reset_init { config } {
 
        mww $::AT91_WDT_MR $config(wdt_mr_val)  ;# disable watchdog
 
-       set ckgr_mor [expr ($::AT91_PMC_MOSCEN | (255 << 8))]
+       set ckgr_mor [expr {$::AT91_PMC_MOSCEN | (255 << 8)}]
 
        mww $::AT91_CKGR_MOR $ckgr_mor  ;# CKGR_MOR - enable main osc.
        while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_MOSCS] != $::AT91_PMC_MOSCS } { sleep 1 }
 
        set pllar_val   [expr $::AT91_PMC_PLLA_WR_ERRATA] ;# Bit 29 must be 1 when prog
-       set pllar_val   [expr ($pllar_val | $::AT91_PMC_OUT)]
-       set pllar_val   [expr ($pllar_val | $::AT91_PMC_PLLCOUNT)]
+       set pllar_val   [expr {$pllar_val | $::AT91_PMC_OUT}]
+       set pllar_val   [expr {$pllar_val | $::AT91_PMC_PLLCOUNT}]
        set pllar_val   [expr ($pllar_val | ($config(master_pll_mul) - 1) << 16)]
        set pllar_val   [expr ($pllar_val | $config(master_pll_div))]
 
@@ -37,9 +37,9 @@ proc at91sam9_reset_init { config } {
 
        ;# PCK/2 = MCK Master Clock from PLLA
        set mckr_val    [expr $::AT91_PMC_CSS_PLLA]
-       set mckr_val    [expr ($mckr_val | $::AT91_PMC_PRES_1)]
-       set mckr_val    [expr ($mckr_val | $::AT91SAM9_PMC_MDIV_2)]
-       set mckr_val    [expr ($mckr_val | $::AT91_PMC_PDIV_1)]
+       set mckr_val    [expr {$mckr_val | $::AT91_PMC_PRES_1}]
+       set mckr_val    [expr {$mckr_val | $::AT91SAM9_PMC_MDIV_2}]
+       set mckr_val    [expr {$mckr_val | $::AT91_PMC_PDIV_1}]
 
        mww $::AT91_PMC_MCKR $mckr_val  ;# PMC_MCKR (MCLK: 0x102 - (CLK/2)MHZ, 0x202 - (CLK/3)MHz)
        while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_MCKRDY] != $::AT91_PMC_MCKRDY } { sleep 1 }
@@ -51,19 +51,19 @@ proc at91sam9_reset_init { config } {
        arm7_9 fast_memory_access enable
 
        set rstc_mr_val [expr ($::AT91_RSTC_KEY)]
-       set rstc_mr_val [expr ($rstc_mr_val | $::AT91_RSTC_URSTEN)]
+       set rstc_mr_val [expr {$rstc_mr_val | $::AT91_RSTC_URSTEN}]
        mww $::AT91_RSTC_MR $rstc_mr_val        ;# user reset enable
 
        if { [info exists config(sdram_piod)] } {
-               set pdr_addr    [expr ($::AT91_PIOD + $::PIO_PDR)]
-               set pudr_addr   [expr ($::AT91_PIOD + $::PIO_PUDR)]
-               set asr_addr    [expr ($::AT91_PIOD + $::PIO_ASR)]
+               set pdr_addr    [expr {$::AT91_PIOD + $::PIO_PDR}]
+               set pudr_addr   [expr {$::AT91_PIOD + $::PIO_PUDR}]
+               set asr_addr    [expr {$::AT91_PIOD + $::PIO_ASR}]
                mww $pdr_addr 0xffff0000                                ;# define PDC[31:16] as DATA[31:16]
                mww $pudr_addr 0xffff0000                               ;# no pull-up for D[31:16]
                mww $asr_addr 0xffff0000
        } else {
-               set pdr_addr    [expr ($::AT91_PIOC + $::PIO_PDR)]
-               set pudr_addr   [expr ($::AT91_PIOC + $::PIO_PUDR)]
+               set pdr_addr    [expr {$::AT91_PIOC + $::PIO_PDR}]
+               set pudr_addr   [expr {$::AT91_PIOC + $::PIO_PUDR}]
                mww $pdr_addr 0xffff0000                                ;# define PDC[31:16] as DATA[31:16]
                mww $pudr_addr 0xffff0000                               ;# no pull-up for D[31:16]
        }