mww $::AT91_PMC_MCKR $mckr_val ;# PMC_MCKR (MCLK: 0x102 - (CLK/2)MHZ, 0x202 - (CLK/3)MHz)
while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_MCKRDY] != $::AT91_PMC_MCKRDY } { sleep 1 }
- ## switch JTAG clock to highseepd clock
+ ## switch JTAG clock to highspeed clock
jtag_rclk 0
arm7_9 dcc_downloads enable ;# Enable faster DCC downloads