-set AT91_MATRIX_MCFG0 [expr ($AT91_MATRIX + 0x00)] ;# Master Configuration Register 0
-set AT91_MATRIX_MCFG1 [expr ($AT91_MATRIX + 0x04)] ;# Master Configuration Register 1
-set AT91_MATRIX_MCFG2 [expr ($AT91_MATRIX + 0x08)] ;# Master Configuration Register 2
-set AT91_MATRIX_MCFG3 [expr ($AT91_MATRIX + 0x0C)] ;# Master Configuration Register 3
-set AT91_MATRIX_MCFG4 [expr ($AT91_MATRIX + 0x10)] ;# Master Configuration Register 4
-set AT91_MATRIX_MCFG5 [expr ($AT91_MATRIX + 0x14)] ;# Master Configuration Register 5
-set AT91_MATRIX_MCFG6 [expr ($AT91_MATRIX + 0x18)] ;# Master Configuration Register 6
-set AT91_MATRIX_MCFG7 [expr ($AT91_MATRIX + 0x1C)] ;# Master Configuration Register 7
-set AT91_MATRIX_MCFG8 [expr ($AT91_MATRIX + 0x20)] ;# Master Configuration Register 8
-set AT91_MATRIX_ULBT [expr (7 << 0)] ;# Undefined Length Burst Type
-set AT91_MATRIX_ULBT_INFINITE [expr (0 << 0)]
-set AT91_MATRIX_ULBT_SINGLE [expr (1 << 0)]
-set AT91_MATRIX_ULBT_FOUR [expr (2 << 0)]
-set AT91_MATRIX_ULBT_EIGHT [expr (3 << 0)]
-set AT91_MATRIX_ULBT_SIXTEEN [expr (4 << 0)]
+set AT91_MATRIX_MCFG0 [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register 0
+set AT91_MATRIX_MCFG1 [expr {$AT91_MATRIX + 0x04}] ;# Master Configuration Register 1
+set AT91_MATRIX_MCFG2 [expr {$AT91_MATRIX + 0x08}] ;# Master Configuration Register 2
+set AT91_MATRIX_MCFG3 [expr {$AT91_MATRIX + 0x0C}] ;# Master Configuration Register 3
+set AT91_MATRIX_MCFG4 [expr {$AT91_MATRIX + 0x10}] ;# Master Configuration Register 4
+set AT91_MATRIX_MCFG5 [expr {$AT91_MATRIX + 0x14}] ;# Master Configuration Register 5
+set AT91_MATRIX_MCFG6 [expr {$AT91_MATRIX + 0x18}] ;# Master Configuration Register 6
+set AT91_MATRIX_MCFG7 [expr {$AT91_MATRIX + 0x1C}] ;# Master Configuration Register 7
+set AT91_MATRIX_MCFG8 [expr {$AT91_MATRIX + 0x20}] ;# Master Configuration Register 8
+set AT91_MATRIX_ULBT [expr {7 << 0}] ;# Undefined Length Burst Type
+set AT91_MATRIX_ULBT_INFINITE [expr {0 << 0}]
+set AT91_MATRIX_ULBT_SINGLE [expr {1 << 0}]
+set AT91_MATRIX_ULBT_FOUR [expr {2 << 0}]
+set AT91_MATRIX_ULBT_EIGHT [expr {3 << 0}]
+set AT91_MATRIX_ULBT_SIXTEEN [expr {4 << 0}]
-set AT91_MATRIX_SCFG0 [expr ($AT91_MATRIX + 0x40)] ;# Slave Configuration Register 0
-set AT91_MATRIX_SCFG1 [expr ($AT91_MATRIX + 0x44)] ;# Slave Configuration Register 1
-set AT91_MATRIX_SCFG2 [expr ($AT91_MATRIX + 0x48)] ;# Slave Configuration Register 2
-set AT91_MATRIX_SCFG3 [expr ($AT91_MATRIX + 0x4C)] ;# Slave Configuration Register 3
-set AT91_MATRIX_SCFG4 [expr ($AT91_MATRIX + 0x50)] ;# Slave Configuration Register 4
-set AT91_MATRIX_SCFG5 [expr ($AT91_MATRIX + 0x54)] ;# Slave Configuration Register 5
-set AT91_MATRIX_SCFG6 [expr ($AT91_MATRIX + 0x58)] ;# Slave Configuration Register 6
-set AT91_MATRIX_SCFG7 [expr ($AT91_MATRIX + 0x5C)] ;# Slave Configuration Register 7
-set AT91_MATRIX_SLOT_CYCLE [expr (0xff << 0)] ;# Maximum Number of Allowed Cycles for a Burst
-set AT91_MATRIX_DEFMSTR_TYPE [expr (3 << 16)] ;# Default Master Type
-set AT91_MATRIX_DEFMSTR_TYPE_NONE [expr (0 << 16)]
-set AT91_MATRIX_DEFMSTR_TYPE_LAST [expr (1 << 16)]
-set AT91_MATRIX_DEFMSTR_TYPE_FIXED [expr (2 << 16)]
-set AT91_MATRIX_FIXED_DEFMSTR [expr (0xf << 18)] ;# Fixed Index of Default Master
-set AT91_MATRIX_ARBT [expr (3 << 24)] ;# Arbitration Type
-set AT91_MATRIX_ARBT_ROUND_ROBIN [expr (0 << 24)]
-set AT91_MATRIX_ARBT_FIXED_PRIORITY [expr (1 << 24)]
+set AT91_MATRIX_SCFG0 [expr {$AT91_MATRIX + 0x40}] ;# Slave Configuration Register 0
+set AT91_MATRIX_SCFG1 [expr {$AT91_MATRIX + 0x44}] ;# Slave Configuration Register 1
+set AT91_MATRIX_SCFG2 [expr {$AT91_MATRIX + 0x48}] ;# Slave Configuration Register 2
+set AT91_MATRIX_SCFG3 [expr {$AT91_MATRIX + 0x4C}] ;# Slave Configuration Register 3
+set AT91_MATRIX_SCFG4 [expr {$AT91_MATRIX + 0x50}] ;# Slave Configuration Register 4
+set AT91_MATRIX_SCFG5 [expr {$AT91_MATRIX + 0x54}] ;# Slave Configuration Register 5
+set AT91_MATRIX_SCFG6 [expr {$AT91_MATRIX + 0x58}] ;# Slave Configuration Register 6
+set AT91_MATRIX_SCFG7 [expr {$AT91_MATRIX + 0x5C}] ;# Slave Configuration Register 7
+set AT91_MATRIX_SLOT_CYCLE [expr {0xff << 0}] ;# Maximum Number of Allowed Cycles for a Burst
+set AT91_MATRIX_DEFMSTR_TYPE [expr {3 << 16}] ;# Default Master Type
+set AT91_MATRIX_DEFMSTR_TYPE_NONE [expr {0 << 16}]
+set AT91_MATRIX_DEFMSTR_TYPE_LAST [expr {1 << 16}]
+set AT91_MATRIX_DEFMSTR_TYPE_FIXED [expr {2 << 16}]
+set AT91_MATRIX_FIXED_DEFMSTR [expr {0xf << 18}] ;# Fixed Index of Default Master
+set AT91_MATRIX_ARBT [expr {3 << 24}] ;# Arbitration Type
+set AT91_MATRIX_ARBT_ROUND_ROBIN [expr {0 << 24}]
+set AT91_MATRIX_ARBT_FIXED_PRIORITY [expr {1 << 24}]
-set AT91_MATRIX_PRAS0 [expr ($AT91_MATRIX + 0x80)] ;# Priority Register A for Slave 0
-set AT91_MATRIX_PRBS0 [expr ($AT91_MATRIX + 0x84)] ;# Priority Register B for Slave 0
-set AT91_MATRIX_PRAS1 [expr ($AT91_MATRIX + 0x88)] ;# Priority Register A for Slave 1
-set AT91_MATRIX_PRBS1 [expr ($AT91_MATRIX + 0x8C)] ;# Priority Register B for Slave 1
-set AT91_MATRIX_PRAS2 [expr ($AT91_MATRIX + 0x90)] ;# Priority Register A for Slave 2
-set AT91_MATRIX_PRBS2 [expr ($AT91_MATRIX + 0x94)] ;# Priority Register B for Slave 2
-set AT91_MATRIX_PRAS3 [expr ($AT91_MATRIX + 0x98)] ;# Priority Register A for Slave 3
-set AT91_MATRIX_PRBS3 [expr ($AT91_MATRIX + 0x9C)] ;# Priority Register B for Slave 3
-set AT91_MATRIX_PRAS4 [expr ($AT91_MATRIX + 0xA0)] ;# Priority Register A for Slave 4
-set AT91_MATRIX_PRBS4 [expr ($AT91_MATRIX + 0xA4)] ;# Priority Register B for Slave 4
-set AT91_MATRIX_PRAS5 [expr ($AT91_MATRIX + 0xA8)] ;# Priority Register A for Slave 5
-set AT91_MATRIX_PRBS5 [expr ($AT91_MATRIX + 0xAC)] ;# Priority Register B for Slave 5
-set AT91_MATRIX_PRAS6 [expr ($AT91_MATRIX + 0xB0)] ;# Priority Register A for Slave 6
-set AT91_MATRIX_PRBS6 [expr ($AT91_MATRIX + 0xB4)] ;# Priority Register B for Slave 6
-set AT91_MATRIX_PRAS7 [expr ($AT91_MATRIX + 0xB8)] ;# Priority Register A for Slave 7
-set AT91_MATRIX_PRBS7 [expr ($AT91_MATRIX + 0xBC)] ;# Priority Register B for Slave 7
-set AT91_MATRIX_M0PR [expr (3 << 0)] ;# Master 0 Priority
-set AT91_MATRIX_M1PR [expr (3 << 4)] ;# Master 1 Priority
-set AT91_MATRIX_M2PR [expr (3 << 8)] ;# Master 2 Priority
-set AT91_MATRIX_M3PR [expr (3 << 12)] ;# Master 3 Priority
-set AT91_MATRIX_M4PR [expr (3 << 16)] ;# Master 4 Priority
-set AT91_MATRIX_M5PR [expr (3 << 20)] ;# Master 5 Priority
-set AT91_MATRIX_M6PR [expr (3 << 24)] ;# Master 6 Priority
-set AT91_MATRIX_M7PR [expr (3 << 28)] ;# Master 7 Priority
-set AT91_MATRIX_M8PR [expr (3 << 0)] ;# Master 8 Priority (in Register B)
+set AT91_MATRIX_PRAS0 [expr {$AT91_MATRIX + 0x80}] ;# Priority Register A for Slave 0
+set AT91_MATRIX_PRBS0 [expr {$AT91_MATRIX + 0x84}] ;# Priority Register B for Slave 0
+set AT91_MATRIX_PRAS1 [expr {$AT91_MATRIX + 0x88}] ;# Priority Register A for Slave 1
+set AT91_MATRIX_PRBS1 [expr {$AT91_MATRIX + 0x8C}] ;# Priority Register B for Slave 1
+set AT91_MATRIX_PRAS2 [expr {$AT91_MATRIX + 0x90}] ;# Priority Register A for Slave 2
+set AT91_MATRIX_PRBS2 [expr {$AT91_MATRIX + 0x94}] ;# Priority Register B for Slave 2
+set AT91_MATRIX_PRAS3 [expr {$AT91_MATRIX + 0x98}] ;# Priority Register A for Slave 3
+set AT91_MATRIX_PRBS3 [expr {$AT91_MATRIX + 0x9C}] ;# Priority Register B for Slave 3
+set AT91_MATRIX_PRAS4 [expr {$AT91_MATRIX + 0xA0}] ;# Priority Register A for Slave 4
+set AT91_MATRIX_PRBS4 [expr {$AT91_MATRIX + 0xA4}] ;# Priority Register B for Slave 4
+set AT91_MATRIX_PRAS5 [expr {$AT91_MATRIX + 0xA8}] ;# Priority Register A for Slave 5
+set AT91_MATRIX_PRBS5 [expr {$AT91_MATRIX + 0xAC}] ;# Priority Register B for Slave 5
+set AT91_MATRIX_PRAS6 [expr {$AT91_MATRIX + 0xB0}] ;# Priority Register A for Slave 6
+set AT91_MATRIX_PRBS6 [expr {$AT91_MATRIX + 0xB4}] ;# Priority Register B for Slave 6
+set AT91_MATRIX_PRAS7 [expr {$AT91_MATRIX + 0xB8}] ;# Priority Register A for Slave 7
+set AT91_MATRIX_PRBS7 [expr {$AT91_MATRIX + 0xBC}] ;# Priority Register B for Slave 7
+set AT91_MATRIX_M0PR [expr {3 << 0}] ;# Master 0 Priority
+set AT91_MATRIX_M1PR [expr {3 << 4}] ;# Master 1 Priority
+set AT91_MATRIX_M2PR [expr {3 << 8}] ;# Master 2 Priority
+set AT91_MATRIX_M3PR [expr {3 << 12}] ;# Master 3 Priority
+set AT91_MATRIX_M4PR [expr {3 << 16}] ;# Master 4 Priority
+set AT91_MATRIX_M5PR [expr {3 << 20}] ;# Master 5 Priority
+set AT91_MATRIX_M6PR [expr {3 << 24}] ;# Master 6 Priority
+set AT91_MATRIX_M7PR [expr {3 << 28}] ;# Master 7 Priority
+set AT91_MATRIX_M8PR [expr {3 << 0}] ;# Master 8 Priority (in Register B)
-set AT91_MATRIX_MRCR [expr ($AT91_MATRIX + 0x100)] ;# Master Remap Control Register
-set AT91_MATRIX_RCB0 [expr (1 << 0)] ;# Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master)
-set AT91_MATRIX_RCB1 [expr (1 << 1)] ;# Remap Command for AHB Master 1 (ARM926EJ-S Data Master)
-set AT91_MATRIX_RCB2 [expr (1 << 2)]
-set AT91_MATRIX_RCB3 [expr (1 << 3)]
-set AT91_MATRIX_RCB4 [expr (1 << 4)]
-set AT91_MATRIX_RCB5 [expr (1 << 5)]
-set AT91_MATRIX_RCB6 [expr (1 << 6)]
-set AT91_MATRIX_RCB7 [expr (1 << 7)]
-set AT91_MATRIX_RCB8 [expr (1 << 8)]
+set AT91_MATRIX_MRCR [expr {$AT91_MATRIX + 0x100}] ;# Master Remap Control Register
+set AT91_MATRIX_RCB0 [expr {1 << 0}] ;# Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master)
+set AT91_MATRIX_RCB1 [expr {1 << 1}] ;# Remap Command for AHB Master 1 (ARM926EJ-S Data Master)
+set AT91_MATRIX_RCB2 [expr {1 << 2}]
+set AT91_MATRIX_RCB3 [expr {1 << 3}]
+set AT91_MATRIX_RCB4 [expr {1 << 4}]
+set AT91_MATRIX_RCB5 [expr {1 << 5}]
+set AT91_MATRIX_RCB6 [expr {1 << 6}]
+set AT91_MATRIX_RCB7 [expr {1 << 7}]
+set AT91_MATRIX_RCB8 [expr {1 << 8}]
-set AT91_MATRIX_TCMR [expr ($AT91_MATRIX + 0x114)] ;# TCM Configuration Register
-set AT91_MATRIX_ITCM_SIZE [expr (0xf << 0)] ;# Size of ITCM enabled memory block
-set AT91_MATRIX_ITCM_0 [expr (0 << 0)]
-set AT91_MATRIX_ITCM_16 [expr (5 << 0)]
-set AT91_MATRIX_ITCM_32 [expr (6 << 0)]
-set AT91_MATRIX_DTCM_SIZE [expr (0xf << 4)] ;# Size of DTCM enabled memory block
-set AT91_MATRIX_DTCM_0 [expr (0 << 4)]
-set AT91_MATRIX_DTCM_16 [expr (5 << 4)]
-set AT91_MATRIX_DTCM_32 [expr (6 << 4)]
+set AT91_MATRIX_TCMR [expr {$AT91_MATRIX + 0x114}] ;# TCM Configuration Register
+set AT91_MATRIX_ITCM_SIZE [expr {0xf << 0}] ;# Size of ITCM enabled memory block
+set AT91_MATRIX_ITCM_0 [expr {0 << 0}]
+set AT91_MATRIX_ITCM_16 [expr {5 << 0}]
+set AT91_MATRIX_ITCM_32 [expr {6 << 0}]
+set AT91_MATRIX_DTCM_SIZE [expr {0xf << 4}] ;# Size of DTCM enabled memory block
+set AT91_MATRIX_DTCM_0 [expr {0 << 4}]
+set AT91_MATRIX_DTCM_16 [expr {5 << 4}]
+set AT91_MATRIX_DTCM_32 [expr {6 << 4}]
-set AT91_MATRIX_EBI0CSA [expr ($AT91_MATRIX + 0x120)] ;# EBI0 Chip Select Assignment Register
-set AT91_MATRIX_EBI0_CS1A [expr (1 << 1)] ;# Chip Select 1 Assignment
-set AT91_MATRIX_EBI0_CS1A_SMC [expr (0 << 1)]
-set AT91_MATRIX_EBI0_CS1A_SDRAMC [expr (1 << 1)]
-set AT91_MATRIX_EBI0_CS3A [expr (1 << 3)] ;# Chip Select 3 Assignmen
-set AT91_MATRIX_EBI0_CS3A_SMC [expr (0 << 3)]
-set AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA [expr (1 << 3)]
-set AT91_MATRIX_EBI0_CS4A [expr (1 << 4)] ;# Chip Select 4 Assignment
-set AT91_MATRIX_EBI0_CS4A_SMC [expr (0 << 4)]
-set AT91_MATRIX_EBI0_CS4A_SMC_CF1 [expr (1 << 4)]
-set AT91_MATRIX_EBI0_CS5A [expr (1 << 5)] ;# Chip Select 5 Assignment
-set AT91_MATRIX_EBI0_CS5A_SMC [expr (0 << 5)]
-set AT91_MATRIX_EBI0_CS5A_SMC_CF2 [expr (1 << 5)]
-set AT91_MATRIX_EBI0_DBPUC [expr (1 << 8)] ;# Data Bus Pull-up Configuration
-set AT91_MATRIX_EBI0_VDDIOMSEL [expr (1 << 16)] ;# Memory voltage selection
-set AT91_MATRIX_EBI0_VDDIOMSEL_1_8V [expr (0 << 16)]
-set AT91_MATRIX_EBI0_VDDIOMSEL_3_3V [expr (1 << 16)]
+set AT91_MATRIX_EBI0CSA [expr {$AT91_MATRIX + 0x120}] ;# EBI0 Chip Select Assignment Register
+set AT91_MATRIX_EBI0_CS1A [expr {1 << 1}] ;# Chip Select 1 Assignment
+set AT91_MATRIX_EBI0_CS1A_SMC [expr {0 << 1}]
+set AT91_MATRIX_EBI0_CS1A_SDRAMC [expr {1 << 1}]
+set AT91_MATRIX_EBI0_CS3A [expr {1 << 3}] ;# Chip Select 3 Assignmen
+set AT91_MATRIX_EBI0_CS3A_SMC [expr {0 << 3}]
+set AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA [expr {1 << 3}]
+set AT91_MATRIX_EBI0_CS4A [expr {1 << 4}] ;# Chip Select 4 Assignment
+set AT91_MATRIX_EBI0_CS4A_SMC [expr {0 << 4}]
+set AT91_MATRIX_EBI0_CS4A_SMC_CF1 [expr {1 << 4}]
+set AT91_MATRIX_EBI0_CS5A [expr {1 << 5}] ;# Chip Select 5 Assignment
+set AT91_MATRIX_EBI0_CS5A_SMC [expr {0 << 5}]
+set AT91_MATRIX_EBI0_CS5A_SMC_CF2 [expr {1 << 5}]
+set AT91_MATRIX_EBI0_DBPUC [expr {1 << 8}] ;# Data Bus Pull-up Configuration
+set AT91_MATRIX_EBI0_VDDIOMSEL [expr {1 << 16}] ;# Memory voltage selection
+set AT91_MATRIX_EBI0_VDDIOMSEL_1_8V [expr {0 << 16}]
+set AT91_MATRIX_EBI0_VDDIOMSEL_3_3V [expr {1 << 16}]
-set AT91_MATRIX_EBI1CSA [expr ($AT91_MATRIX + 0x124)] ;# EBI1 Chip Select Assignment Register
-set AT91_MATRIX_EBI1_CS1A [expr (1 << 1)] ;# Chip Select 1 Assignment
-set AT91_MATRIX_EBI1_CS1A_SMC [expr (0 << 1)]
-set AT91_MATRIX_EBI1_CS1A_SDRAMC [expr (1 << 1)]
-set AT91_MATRIX_EBI1_CS2A [expr (1 << 3)] ;# Chip Select 3 Assignment
-set AT91_MATRIX_EBI1_CS2A_SMC [expr (0 << 3)]
-set AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA [expr (1 << 3)]
-set AT91_MATRIX_EBI1_DBPUC [expr (1 << 8)] ;# Data Bus Pull-up Configuration
-set AT91_MATRIX_EBI1_VDDIOMSEL [expr (1 << 16)] ;# Memory voltage selection
-set AT91_MATRIX_EBI1_VDDIOMSEL_1_8V [expr (0 << 16)]
-set AT91_MATRIX_EBI1_VDDIOMSEL_3_3V [expr (1 << 16)]
+set AT91_MATRIX_EBI1CSA [expr {$AT91_MATRIX + 0x124}] ;# EBI1 Chip Select Assignment Register
+set AT91_MATRIX_EBI1_CS1A [expr {1 << 1}] ;# Chip Select 1 Assignment
+set AT91_MATRIX_EBI1_CS1A_SMC [expr {0 << 1}]
+set AT91_MATRIX_EBI1_CS1A_SDRAMC [expr {1 << 1}]
+set AT91_MATRIX_EBI1_CS2A [expr {1 << 3}] ;# Chip Select 3 Assignment
+set AT91_MATRIX_EBI1_CS2A_SMC [expr {0 << 3}]
+set AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA [expr {1 << 3}]
+set AT91_MATRIX_EBI1_DBPUC [expr {1 << 8}] ;# Data Bus Pull-up Configuration
+set AT91_MATRIX_EBI1_VDDIOMSEL [expr {1 << 16}] ;# Memory voltage selection
+set AT91_MATRIX_EBI1_VDDIOMSEL_1_8V [expr {0 << 16}]
+set AT91_MATRIX_EBI1_VDDIOMSEL_3_3V [expr {1 << 16}]
projects / fw / openocd / blobdiff