at91: add at91sam9263 chip register definition
[fw/openocd] / tcl / chip / atmel / at91 / at91sam9263.cfg
diff --git a/tcl/chip/atmel/at91/at91sam9263.cfg b/tcl/chip/atmel/at91/at91sam9263.cfg
new file mode 100644 (file)
index 0000000..8e22eb2
--- /dev/null
@@ -0,0 +1,113 @@
+#
+# Peripheral identifiers/interrupts.
+#
+set AT91_ID_FIQ                0       ;# Advanced Interrupt Controller (FIQ)
+set AT91_ID_SYS                1       ;# System Peripherals
+set AT91SAM9263_ID_PIOA        2       ;# Parallel IO Controller A
+set AT91SAM9263_ID_PIOB        3       ;# Parallel IO Controller B
+set AT91SAM9263_ID_PIOCDE      4       ;# Parallel IO Controller C, D and E
+set AT91SAM9263_ID_US0 7       ;# USART 0
+set AT91SAM9263_ID_US1 8       ;# USART 1
+set AT91SAM9263_ID_US2 9       ;# USART 2
+set AT91SAM9263_ID_MCI0        10      ;# Multimedia Card Interface 0
+set AT91SAM9263_ID_MCI1        11      ;# Multimedia Card Interface 1
+set AT91SAM9263_ID_CAN 12      ;# CAN
+set AT91SAM9263_ID_TWI 13      ;# Two-Wire Interface
+set AT91SAM9263_ID_SPI0        14      ;# Serial Peripheral Interface 0
+set AT91SAM9263_ID_SPI1        15      ;# Serial Peripheral Interface 1
+set AT91SAM9263_ID_SSC0        16      ;# Serial Synchronous Controller 0
+set AT91SAM9263_ID_SSC1        17      ;# Serial Synchronous Controller 1
+set AT91SAM9263_ID_AC97C       18      ;# AC97 Controller
+set AT91SAM9263_ID_TCB 19      ;# Timer Counter 0, 1 and 2
+set AT91SAM9263_ID_PWMC        20      ;# Pulse Width Modulation Controller
+set AT91SAM9263_ID_EMAC        21      ;# Ethernet
+set AT91SAM9263_ID_2DGE        23      ;# 2D Graphic Engine
+set AT91SAM9263_ID_UDP 24      ;# USB Device Port
+set AT91SAM9263_ID_ISI 25      ;# Image Sensor Interface
+set AT91SAM9263_ID_LCDC        26      ;# LCD Controller
+set AT91SAM9263_ID_DMA 27      ;# DMA Controller
+set AT91SAM9263_ID_UHP 29      ;# USB Host port
+set AT91SAM9263_ID_IRQ0        30      ;# Advanced Interrupt Controller (IRQ0)
+set AT91SAM9263_ID_IRQ1        31      ;# Advanced Interrupt Controller (IRQ1)
+
+
+#
+# User Peripheral physical base addresses.
+#
+set AT91SAM9263_BASE_UDP               0xfff78000
+set AT91SAM9263_BASE_TCB0              0xfff7c000
+set AT91SAM9263_BASE_TC0               0xfff7c000
+set AT91SAM9263_BASE_TC1               0xfff7c040
+set AT91SAM9263_BASE_TC2               0xfff7c080
+set AT91SAM9263_BASE_MCI0              0xfff80000
+set AT91SAM9263_BASE_MCI1              0xfff84000
+set AT91SAM9263_BASE_TWI               0xfff88000
+set AT91SAM9263_BASE_US0               0xfff8c000
+set AT91SAM9263_BASE_US1               0xfff90000
+set AT91SAM9263_BASE_US2               0xfff94000
+set AT91SAM9263_BASE_SSC0              0xfff98000
+set AT91SAM9263_BASE_SSC1              0xfff9c000
+set AT91SAM9263_BASE_AC97C             0xfffa0000
+set AT91SAM9263_BASE_SPI0              0xfffa4000
+set AT91SAM9263_BASE_SPI1              0xfffa8000
+set AT91SAM9263_BASE_CAN               0xfffac000
+set AT91SAM9263_BASE_PWMC              0xfffb8000
+set AT91SAM9263_BASE_EMAC              0xfffbc000
+set AT91SAM9263_BASE_ISI               0xfffc4000
+set AT91SAM9263_BASE_2DGE              0xfffc8000
+set AT91_BASE_SYS                      0xffffe000
+
+#
+# System Peripherals (offset from AT91_BASE_SYS)
+#
+set AT91_ECC0          0xffffe000
+set AT91_SDRAMC0       0xffffe200
+set AT91_SMC0          0xffffe400
+set AT91_ECC1          0xffffe600
+set AT91_SDRAMC1       0xffffe800
+set AT91_SMC1          0xffffea00
+set AT91_MATRIX                0xffffec00
+set AT91_CCFG          0xffffed10
+set AT91_DBGU          0xffffee00
+set AT91_AIC           0xfffff000
+set AT91_PIOA          0xfffff200
+set AT91_PIOB          0xfffff400
+set AT91_PIOC          0xfffff600
+set AT91_PIOD          0xfffff800
+set AT91_PIOE          0xfffffa00
+set AT91_PMC           0xfffffc00
+set AT91_RSTC          0xfffffd00
+set AT91_SHDWC         0xfffffd10
+set AT91_RTT0          0xfffffd20
+set AT91_PIT           0xfffffd30
+set AT91_WDT           0xfffffd40
+set AT91_RTT1          0xfffffd50
+set AT91_GPBR          0xfffffd60
+
+set AT91_USART0        $AT91SAM9263_BASE_US0
+set AT91_USART1        $AT91SAM9263_BASE_US1
+set AT91_USART2        $AT91SAM9263_BASE_US2
+
+set AT91_SMC   $AT91_SMC0
+set AT91_SDRAMC        $AT91_SDRAMC0
+
+#
+# Internal Memory.
+#
+set AT91SAM9263_SRAM0_BASE     0x00300000      ;# Internal SRAM 0 base address
+set AT91SAM9263_SRAM0_SIZE     0x00014000      ;# Internal SRAM 0 size (80Kb)
+
+set AT91SAM9263_ROM_BASE       0x00400000      ;# Internal ROM base address
+set AT91SAM9263_ROM_SIZE       0x00020000      ;# Internal ROM size (128Kb)
+
+set AT91SAM9263_SRAM1_BASE     0x00500000      ;# Internal SRAM 1 base address
+set AT91SAM9263_SRAM1_SIZE     0x00004000      ;# Internal SRAM 1 size (16Kb)
+
+set AT91SAM9263_LCDC_BASE      0x00700000      ;# LCD Controller
+set AT91SAM9263_DMAC_BASE      0x00800000      ;# DMA Controller
+set AT91SAM9263_UHP_BASE       0x00a00000      ;# USB Host controller
+
+#
+# Cpu Name
+#
+set AT91_CPU_NAME      "AT91SAM9263"