tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

[fw/openocd] / tcl / chip / atmel / at91 / at91_rstc.cfg

diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg b/tcl/chip/atmel/at91/at91_rstc.cfg
index ed6082227801c742bc4257e2d64d1b91e321adb1..6673fe645296cf4b22d9b53a3edd733230e83d02 100644 (file)
--- a/tcl/chip/atmel/at91/at91_rstc.cfg
+++ b/tcl/chip/atmel/at91/at91_rstc.cfg
@@ -1,21 +1,21 @@
-set AT91_RSTC_CR               [expr ($AT91_RSTC + 0x00)]      ;# Reset Controller Control Register
-set            AT91_RSTC_PROCRST       [expr (1 << 0)]         ;# Processor Reset
-set            AT91_RSTC_PERRST        [expr (1 << 2)]         ;# Peripheral Reset
-set            AT91_RSTC_EXTRST        [expr (1 << 3)]         ;# External Reset
-set            AT91_RSTC_KEY           [expr (0xa5 << 24)]             ;# KEY Password
+set AT91_RSTC_CR               [expr {$AT91_RSTC + 0x00}]      ;# Reset Controller Control Register
+set            AT91_RSTC_PROCRST       [expr {1 << 0}]         ;# Processor Reset
+set            AT91_RSTC_PERRST        [expr {1 << 2}]         ;# Peripheral Reset
+set            AT91_RSTC_EXTRST        [expr {1 << 3}]         ;# External Reset
+set            AT91_RSTC_KEY           [expr {0xa5 << 24}]             ;# KEY Password
 
-set AT91_RSTC_SR               [expr ($AT91_RSTC + 0x04)]      ;# Reset Controller Status Register
-set            AT91_RSTC_URSTS         [expr (1 << 0)]         ;# User Reset Status
-set            AT91_RSTC_RSTTYP        [expr (7 << 8)]         ;# Reset Type
-set                    AT91_RSTC_RSTTYP_GENERAL        [expr (0 << 8)]
-set                    AT91_RSTC_RSTTYP_WAKEUP         [expr (1 << 8)]
-set                    AT91_RSTC_RSTTYP_WATCHDOG       [expr (2 << 8)]
-set                    AT91_RSTC_RSTTYP_SOFTWARE       [expr (3 << 8)]
-set                    AT91_RSTC_RSTTYP_USER   [expr (4 << 8)]
-set            AT91_RSTC_NRSTL         [expr (1 << 16)]                ;# NRST Pin Level
-set            AT91_RSTC_SRCMP         [expr (1 << 17)]                ;# Software Reset Command in Progress
+set AT91_RSTC_SR               [expr {$AT91_RSTC + 0x04}]      ;# Reset Controller Status Register
+set            AT91_RSTC_URSTS         [expr {1 << 0}]         ;# User Reset Status
+set            AT91_RSTC_RSTTYP        [expr {7 << 8}]         ;# Reset Type
+set                    AT91_RSTC_RSTTYP_GENERAL        [expr {0 << 8}]
+set                    AT91_RSTC_RSTTYP_WAKEUP         [expr {1 << 8}]
+set                    AT91_RSTC_RSTTYP_WATCHDOG       [expr {2 << 8}]
+set                    AT91_RSTC_RSTTYP_SOFTWARE       [expr {3 << 8}]
+set                    AT91_RSTC_RSTTYP_USER   [expr {4 << 8}]
+set            AT91_RSTC_NRSTL         [expr {1 << 16}]                ;# NRST Pin Level
+set            AT91_RSTC_SRCMP         [expr {1 << 17}]                ;# Software Reset Command in Progress
 
-set AT91_RSTC_MR               [expr ($AT91_RSTC + 0x08)]      ;# Reset Controller Mode Register
-set            AT91_RSTC_URSTEN        [expr (1 << 0)]         ;# User Reset Enable
-set            AT91_RSTC_URSTIEN       [expr (1 << 4)]         ;# User Reset Interrupt Enable
-set            AT91_RSTC_ERSTL         [expr (0xf << 8)]               ;# External Reset Length
+set AT91_RSTC_MR               [expr {$AT91_RSTC + 0x08}]      ;# Reset Controller Mode Register
+set            AT91_RSTC_URSTEN        [expr {1 << 0}]         ;# User Reset Enable
+set            AT91_RSTC_URSTIEN       [expr {1 << 4}]         ;# User Reset Interrupt Enable
+set            AT91_RSTC_ERSTL         [expr {0xf << 8}]               ;# External Reset Length