tcl/board: add SPDX tag

[fw/openocd] / tcl / board / telo.cfg

diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index d740db2ef767e3f0ecd7f0e0be0dc48603e285d3..721c01975d6442389ba9ee3d770299e2b7c2317a 100644 (file)
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -1,5 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find target/c100.cfg]
-# basic register defintion for C100
+# basic register definition for C100
 source [find target/c100regs.tcl]
 # board-config info
 source [find target/c100config.tcl]
@@ -8,47 +10,51 @@ source [find target/c100helper.tcl]
 
 
 # Telo board & C100 support trst and srst
-# however openocd does not support 
-# 1. setting srst reset pulse width
-# 2. setting delay between srst pulse and JTAG access
-# This really makes the srst useless for now.
+# make the reset asserted to
+# allow RC circuit to discharge for: [ms]
+adapter srst pulse_width 100
+jtag_ntrst_assert_width 100
+# don't talk to JTAG after reset for: [ms]
+adapter srst delay 100
+jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 
 
 
+
 # issue telnet: reset init
 # issue gdb: monitor reset init
 $_TARGETNAME configure -event reset-init {
-       jtag_khz 100
-       # setup GPIO used as control signals for C100
-       setupGPIO
-       # This will allow acces to lower 8MB or NOR
-       lowGPIO5 
-       # setup NOR size,timing,etc.
-       setupNOR
-       # setup internals + PLL + DDR2
-       initC100
+       adapter speed 100
+       # this will setup Telo board
+       setupTelo
        #turn up the JTAG speed
-       jtag_khz 3000
-       puts "JTAG speek now 3MHz"
-       puts "type helpC100 to get help on C100"
+       adapter speed 3000
+       echo "JTAG speek now 3MHz"
+       echo "type helpC100 to get help on C100"
 }
 
 $_TARGETNAME configure -event reset-deassert-post {
        # Force target into ARM state.
-#      soft_reset_halt # not implemented on ARM11
-       puts "Detected SRSRT asserted on C100.CPU"
-       
+#      soft_reset_halt ;# not implemented on ARM11
+       echo "Detected SRSRT asserted on C100.CPU"
+
+}
+
+$_TARGETNAME configure -event reset-assert-post {
+  echo "Assering reset"
+  #sleep 10
 }
 
-proc power_restore {} { puts "Sensed power restore. No action." } 
-proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+proc power_restore {} { echo "Sensed power restore. No action." }
+proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
 
 
 # boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
 # it's really 16MB but the upper 8mb is controller via gpio
 # openocd does not support 'complex reads/writes' to NOR
-flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
 
 # writing data to memory does not work without this
-memwrite burst disable
\ No newline at end of file
+arm11 memwrite burst disable