target/espressif: add semihosting support

[fw/openocd] / tcl / board / spear320cpu.cfg

diff --git a/tcl/board/spear320cpu.cfg b/tcl/board/spear320cpu.cfg
index 71efca769171fb2f395c4a801d74e1e5d800ab17..df713ea3933e5a2352cbea6c86852a538dbbcaaf 100644 (file)
--- a/tcl/board/spear320cpu.cfg
+++ b/tcl/board/spear320cpu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Configuration for the ST SPEAr320 CPU board
 # EVAL_SPEAr320CPU Rev. 2.0
 # http://www.st.com/spear
@@ -34,11 +36,18 @@ if { [info exists BOARD_HAS_SRST] } {
 
 $_TARGETNAME configure -event reset-init { spear320cpu_init }
 
+if { [info exists DDR_CHIPS] } {
+        set _DDR_CHIPS $DDR_CHIPS
+} else {
+        set _DDR_CHIPS 1
+}
+
 proc spear320cpu_init {} {
+       global _DDR_CHIPS
        reg pc 0xffff0020;      # loop forever
 
        sp3xx_clock_default
        sp3xx_common_init
-       sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS
+       sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $_DDR_CHIPS
        sp320_init
 }