Generic Xtensa target config files

[fw/openocd] / tcl / board / snps_em_sk.cfg

diff --git a/tcl/board/snps_em_sk.cfg b/tcl/board/snps_em_sk.cfg
index 63c39a4d44a22d6f2293db59b6cc627a561e910f..56eed93df7615a87c9658c355abbc944bfb925d5 100644 (file)
--- a/tcl/board/snps_em_sk.cfg
+++ b/tcl/board/snps_em_sk.cfg
@@ -1,15 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #  Copyright (C) 2014-2016,2020 Synopsys, Inc.
 #  Anton Kolesov <anton.kolesov@synopsys.com>
 #  Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
 
 #
 # Synopsys DesignWare ARC EM Starter Kit v2.x
 #
 
 # Configure JTAG cable
-# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1.
+# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
 source [find interface/ftdi/digilent-hs1.cfg]
 
 # 5MHz seems to work good with all cores that might happen in 2.x