flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / board / rsc-w910.cfg

diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg
index cb1733b278d346754f1f6d6bf7f0e621f576497a..b07f9405f7798f3e3fc6969bf94ae74ba51a58cb 100644 (file)
--- a/tcl/board/rsc-w910.cfg
+++ b/tcl/board/rsc-w910.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Avalue RSC-W8910 sbc
 # http://www.avalue.com.tw/products/RSC-W910.cfm
 # 2MB NOR Flash
@@ -33,7 +35,7 @@ $_TARGETNAME configure -event reset-start {adapter speed 1000}
 $_TARGETNAME configure -event reset-init {
        # switch on PLL for 200MHz operation
        # running from 15MHz input clock
-       
+
        mww 0xB0000200 0x00000030 ;# CLKEN
        mww 0xB0000204 0x00000f3c ;# CLKSEL
        mww 0xB0000208 0x05007000 ;# CLKDIV
@@ -41,17 +43,17 @@ $_TARGETNAME configure -event reset-init {
        mww 0xB0000210 0x00002b63 ;# PLLCON1
        mww 0xB000000C 0x08817fa6 ;# MFSEL
        sleep 10
-       
+
        # we are now running @ 200MHz
        # enable all openocd speed tweaks
-       
+
        arm7_9 dcc_downloads enable
        arm7_9 fast_memory_access enable
        adapter speed 15000
-       
+
        # map nor flash to 0x20000000
        # map sdram to 0x00000000
-       
+
        mww 0xb0001000 0x000530c1 ;# EBICON
        mww 0xb0001004 0x40030084 ;# ROMCON
        mww 0xb0001008 0x000010ee ;# SDCONF0