tcl/board: add st_nucleo_g4.cfg to cover known STM32G4 NUCLEO boards

[fw/openocd] / tcl / board / rsc-w910.cfg

diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg
index 636a05399d0e7ccaba93993620bfb5ca51aa07dc..574de0c0761e5e8d10add8583fb127d7c2f99174 100644 (file)
--- a/tcl/board/rsc-w910.cfg
+++ b/tcl/board/rsc-w910.cfg
@@ -12,8 +12,8 @@ source [find target/nuc910.cfg]
 #
 reset_config trst_and_srst srst_pulls_trst
 
-adapter_khz 1000
-adapter_nsrst_delay 100
+adapter speed 1000
+adapter srst delay 100
 jtag_ntrst_delay 100
 
 $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0
@@ -28,12 +28,12 @@ nand device $_NANDNAME nuc910 $_TARGETNAME
 # Target events
 #
 
-$_TARGETNAME configure -event reset-start {adapter_khz 1000}
+$_TARGETNAME configure -event reset-start {adapter speed 1000}
 
 $_TARGETNAME configure -event reset-init {
        # switch on PLL for 200MHz operation
        # running from 15MHz input clock
-       
+
        mww 0xB0000200 0x00000030 ;# CLKEN
        mww 0xB0000204 0x00000f3c ;# CLKSEL
        mww 0xB0000208 0x05007000 ;# CLKDIV
@@ -41,17 +41,17 @@ $_TARGETNAME configure -event reset-init {
        mww 0xB0000210 0x00002b63 ;# PLLCON1
        mww 0xB000000C 0x08817fa6 ;# MFSEL
        sleep 10
-       
+
        # we are now running @ 200MHz
        # enable all openocd speed tweaks
-       
+
        arm7_9 dcc_downloads enable
        arm7_9 fast_memory_access enable
-       adapter_khz 15000
-       
+       adapter speed 15000
+
        # map nor flash to 0x20000000
        # map sdram to 0x00000000
-       
+
        mww 0xb0001000 0x000530c1 ;# EBICON
        mww 0xb0001004 0x40030084 ;# ROMCON
        mww 0xb0001008 0x000010ee ;# SDCONF0