# The TI-14 pin needs "trst_only", and J1 connecting 2 & 3.
reset_config trst_and_srst separate
+# NOTE: boards with XOMAP parts wire nSRST to nPWRON_RESET.
+# That resets everything -- including JTAG and EmbeddedICE.
+# So they must use "reset_config srst_pulls_trst".
+
# NOTE: an expansion board could add a trace connector ... if
# it does, change this appropriately. And reset_config too,
# assuming JTAG_DIS reroutes JTAG to that connector.
# standard boards populate two 16 MB chips, but manufacturing
# options or an expansion board could change this config.
-flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
-flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
+flash bank osk.u1 cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
+flash bank osk.u2 cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
proc osk5912_init {} {
omap5912_reset
flash probe 1
}
$_TARGETNAME configure -event reset-init { osk5912_init }
+
+arm7_9 dcc_downloads enable