tcl: Adding the Digilent Atlys board.

[fw/openocd] / tcl / board / or1k_generic.cfg

diff --git a/tcl/board/or1k_generic.cfg b/tcl/board/or1k_generic.cfg
index 9daa7abd53da4a095c0300deb33afeba3cb94924..c543ebe25e02c21181139a2cf0944fc5899cdf94 100644 (file)
--- a/tcl/board/or1k_generic.cfg
+++ b/tcl/board/or1k_generic.cfg
@@ -1,12 +1,21 @@
-# If you want to use the VJTAG TAP, you must set your FPGA TAP ID here
+# If you want to use the VJTAG TAP or the XILINX BSCAN,
+# you must set your FPGA TAP ID here
+
 set FPGATAPID 0x020b30dd
-# Choose your TAP core (VJTAG or MOHOR)
-set TAP_TYPE VJTAG
+
+# Choose your TAP core (VJTAG , MOHOR or XILINX_BSCAN)
+if { [info exists TAP_TYPE] == 0} {
+   set TAP_TYPE VJTAG
+}
+
 # Set your chip name
 set CHIPNAME or1200
 
 source [find target/or1k.cfg]
 
+# Set the servers polling period to 1ms (needed to JSP Server)
+poll_period 1
+
 # Set the adapter speed
 adapter_khz 3000