flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / board / embedded-artists_lpc2478-32.cfg

diff --git a/tcl/board/embedded-artists_lpc2478-32.cfg b/tcl/board/embedded-artists_lpc2478-32.cfg
index 8ef9179de18c12b0096921d746bc77456fd35a99..ef61060800be61a7ddff9551be70702651a4fb8b 100644 (file)
--- a/tcl/board/embedded-artists_lpc2478-32.cfg
+++ b/tcl/board/embedded-artists_lpc2478-32.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Embedded Artists eval board for LPC2478
 # http://www.embeddedartists.com/
 
@@ -8,9 +10,7 @@ source [find target/lpc2478.cfg]
 # Helper
 #
 proc read_register {register} {
-    set result ""
-    mem2array result 32 $register 1
-    return $result(0)
+    return [read_memory $register 32 1]
 }
 
 proc init_board {} {
@@ -26,7 +26,7 @@ proc init_board {} {
     global _CHIPNAME
 
     # A working area will help speeding the flash programming
-    $_TARGETNAME configure -work-area-phys 0x40000200 -work-area-size [expr 0x10000-0x200-0x20] -work-area-backup 0
+    $_TARGETNAME configure -work-area-phys 0x40000200 -work-area-size [expr {0x10000-0x200-0x20}] -work-area-backup 0
 
     # External 16-bit flash at chip select CS0 (SST39VF3201-70, 4 MiB)
     flash bank $_CHIPNAME.extflash cfi 0x80000000 0x400000 2 2 $_TARGETNAME jedec_probe
@@ -125,7 +125,7 @@ proc init_board {} {
 #
 proc enable_pll {} {
     # Disconnect PLL in case it is already connected
-    if {[expr [read_register 0xE01FC080] & 0x03] == 3} {
+    if {[expr {[read_register 0xE01FC080] & 0x03}] == 3} {
         # Disconnect it, but leave it enabled
         # (This MUST be done in two steps)
         mww 0xE01FC080 0x00000001       ;# PLLCON: disconnect PLL