flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / board / csb732.cfg

diff --git a/tcl/board/csb732.cfg b/tcl/board/csb732.cfg
index 9022fafcb15ec493b44d6bbc157548cd72beaff4..6df17500c67daccbb6db2dba6b8291fd8516ba07 100644 (file)
--- a/tcl/board/csb732.cfg
+++ b/tcl/board/csb732.cfg
@@ -1,9 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # The Cogent CSB732 board has a single i.MX35 chip
 source [find target/imx35.cfg]
 
 # Determined by trial and error
 reset_config trst_and_srst combined
-jtag_nsrst_delay 200
+adapter srst delay 200
 jtag_ntrst_delay 200
 
 $_TARGETNAME configure -event gdb-attach { reset init }
@@ -19,13 +21,13 @@ proc csb732_init { } {
        # We assume the interpreter latency is enough.
 
        # Allow access to all coprocessors
-       mcr 15 0 15 1 0 0x2001
+       arm mcr 15 0 15 1 0 0x2001
 
        # Disable MMU, caches, write buffer
-       mcr 15 0 1 0 0 0x78
+       arm mcr 15 0 1 0 0 0x78
 
        # Grant manager access to all domains
-       mcr 15 0 3 0 0 0xFFFFFFFF
+       arm mcr 15 0 3 0 0 0xFFFFFFFF
 
        # Set ARM clock to 532 MHz, AHB to 133 MHz
        mww 0x53F80004 0x1000