DISABLE_PACK_ACC = 0,
DISABLE_PACK_ASSIGN = 0,
DISABLE_PACK_ONE_USE = 0,
- DISABLE_PACK_HL = 1,
+ DISABLE_PACK_HL = 0,
DISABLE_PACK_IY = 0
};
{
currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i);
}
- D (D_ALLOC, ("allocReg: alloced %p\n", ®sZ80[i]));
+ D (D_ALLOC, ("allocReg: alloced %s\n", regsZ80[i].name));
return ®sZ80[i];
}
}
currFunc->regsUsed =
bitVectSetBit (currFunc->regsUsed, i + 1);
}
- D (D_ALLOC, ("tryAllocRegPair: succeded for sym %p\n", sym));
+ D (D_ALLOC, ("tryAllocatingRegPair: succeded for sym %p\n", sym));
return TRUE;
}
}
- D (D_ALLOC, ("tryAllocRegPair: failed on sym %p\n", sym));
+ D (D_ALLOC, ("tryAllocatingRegPair: failed on sym %p\n", sym));
return FALSE;
}
break;
}
}
+ /* Make sure we didn't allocate a register pair with bytes swapped */
+ if(sym->nRegs == 2 && sym->regs[0] == sym->regs[1] + 1 && sym->regs[0] != ®sZ80[2])
+ {
+ freeReg(sym->regs[0]);
+ freeReg(sym->regs[1]);
+ if(!tryAllocatingRegPair(sym))
+ wassertl(0, "Failed to swap register pair bytes back.");
+ }
}
/* if it shares registers with operands make sure
that they are in the same position */
if (ic->op == LEFT_OP && isOperandLiteral (IC_RIGHT (ic)))
continue;
+ if (ic->op == '+' &&
+ (isOperandEqual (op, IC_LEFT (ic)) || isOperandEqual (op, IC_RIGHT (ic))))
+ continue;
+
if ((ic->op == '=' && !POINTER_SET(ic)) ||
ic->op == UNARYMINUS ||
- ic->op == '+' ||
ic->op == '-' ||
ic->op == '>' ||
ic->op == '<' ||
ic->op == EQ_OP ||
- 0)
+ (ic->op == '+' && getSize (operandType (IC_RESULT (ic))) == 1))
+ /* 16 bit addition uses add hl, rr */
continue;
if (ic->op == '*' && isOperandEqual (op, IC_LEFT (ic)))