prevent push/pop-s for SEND registers

[fw/sdcc] / src / z80 / peeph.def

diff --git a/src/z80/peeph.def b/src/z80/peeph.def
index 8e5464978cdd4ed141ead177d9ce4d674b7052b6..a00fd659c13633cb4d20a6532b012532a47ff28c 100644 (file)
--- a/src/z80/peeph.def
+++ b/src/z80/peeph.def
@@ -1,12 +1,12 @@
-replace restart {
+replace {
        ld (hl),(hl)
 } by {
        ERROR - peephole - caught (hl),(hl)
 }
-replace restart {
+replace {
        ld %1,%1
 } by {
-       ; Rule 1: Removed redundent load
+        ; Removed redundent load
 }
 replace restart {
        xor a,a
@@ -22,7 +22,6 @@ replace restart {
        cp a,#0x00
        jp nz,%1
 } by {
-        ; Rule 3: Changed cp #0 to or
        or      a,a
        jp      nz,%1
 }
@@ -33,7 +32,6 @@ replace restart {
        jp      %3
 %2:
 } by {
-       ; Rule 4: Changed jp order
        jp      z,%2
 %1:
        jp      %3
@@ -44,7 +42,6 @@ replace restart {
        jp      %2
 %1:
 } by {
-       ; Rule 5: Changed jump logic
        jp      z,%2
 %1:
 }
@@ -53,7 +50,6 @@ replace restart {
        jp      %2
 %1:
 } by {
-       ; Rule 6: Changed jump logic
        jp      nz,%2
 %1:
 }
@@ -61,14 +57,12 @@ replace restart {
        or      a,%1
        or      a,a
 } by {
-       ; Rule 7: Removed redundent or
        or      a,%1
 }
 replace restart {
        or      a,%1)
         or      a,a
 } by {
-       ; Rule 8: Removed redundent or for (ix)
        or      a,%1)
 }
 replace restart {
@@ -102,4 +96,49 @@ replace restart {
 } by {
         xor     a,a
 }
-        
\ No newline at end of file
+replace {
+        ld      e,#0x00
+        ld      d,#0x00
+} by {
+        ld      de,#0x0000
+}
+replace {
+       ld      l,#0x00
+       ld      h,#0x00
+} by {
+        ld      hl,#0x0000
+}
+replace restart {
+       ld      %1,a
+       ld      a,%1
+} by {
+        ld     %1,a
+}
+replace restart {
+       jp      %1,%2
+       jr      %3
+%2:
+       jp      %4
+} by {
+       jp      %1,%4
+       jr      %3
+%2:
+       jp      %4
+}
+replace {
+       ld      l,e
+       ld      h,d
+       push    hl
+       ld      l,c
+       ld      h,b
+       push    hl
+} by {
+        push   de
+        push    bc
+}
+replace {
+       and     a,#%1
+       or      a,a
+} by {
+        and     a,#%1
+}