Implemented RFE #2485684

[fw/sdcc] / src / z80 / peeph-z80.def

diff --git a/src/z80/peeph-z80.def b/src/z80/peeph-z80.def
index ef6e078f74b0babb811349510f063a1072f11787..6d43c9b2439c503ca1d660a50ee2256ddffc6695 100644 (file)
--- a/src/z80/peeph-z80.def
+++ b/src/z80/peeph-z80.def
@@ -1036,17 +1036,18 @@ replace restart {
 //     ; peephole 50 shortened or using a (which has just been tested to be #0x00).
 //} if operandsNotSame3(%3 '(bc)' '(de)')
 
-replace restart {
-       sub     a,%1
-       jp      NZ,%2
-       ld      a,%3
-       or      a,a
-} by {
-       sub     a,%1
-       jp      NZ,%2
-       or      a,%3
-       ; peephole 51 shortened or using a (which has just been tested to be #0x00).
-}
+// Commented out sine it triggers for %3 od the form (#...)
+//replace restart {
+//     sub     a,%1
+//     jp      NZ,%2
+//     ld      a,%3
+//     or      a,a
+//} by {
+//     sub     a,%1
+//     jp      NZ,%2
+//     or      a,%3
+//     ; peephole 51 shortened or using a (which has just been tested to be #0x00).
+//}
 //if operandsNotSame3(%3 '(bc)' '(de)')
 
 replace restart {