Add option to not reset board on connect

[fw/stlink] / src / test_sg.c

diff --git a/src/test_sg.c b/src/test_sg.c
index d9e560c2375612ae37608ea8872c0c30281fa807..bc16a1c7c8815be48adf48d7107cff6d9c1f783c 100644 (file)
--- a/src/test_sg.c
+++ b/src/test_sg.c
@@ -33,6 +33,8 @@ static void __attribute__((unused)) mark_buf(stlink_t *sl) {
 
 
 int main(int argc, char *argv[]) {
+       /* Avoid unused parameter warning */
+       (void)argv;
        // set scpi lib debug level: 0 for no debug info, 10 for lots
 
        switch (argc) {
@@ -50,7 +52,7 @@ int main(int argc, char *argv[]) {
         break;
        }
 
-       stlink_t *sl = stlink_v1_open(99);
+       stlink_t *sl = stlink_v1_open(99, 1);
        if (sl == NULL)
                return EXIT_FAILURE;
     
@@ -89,23 +91,23 @@ int main(int argc, char *argv[]) {
 #define LED_GREEN      (1<<9) // pin 9
        stlink_read_mem32(sl, GPIOC_CRH, 4);
        uint32_t io_conf = read_uint32(sl->q_buf, 0);
-       DD(sl, "GPIOC_CRH = 0x%08x", io_conf);
+       DLOG("GPIOC_CRH = 0x%08x\n", io_conf);
 
        // set: general purpose output push-pull, output mode, max speed 10 MHz.
        write_uint32(sl->q_buf, 0x44444411);
        stlink_write_mem32(sl, GPIOC_CRH, 4);
 
-       clear_buf(sl);
+       memset(sl->q_buf, 0, sizeof(sl->q_buf));
        for (int i = 0; i < 100; i++) {
                write_uint32(sl->q_buf, LED_BLUE | LED_GREEN);
                stlink_write_mem32(sl, GPIOC_ODR, 4);
                /* stlink_read_mem32(sl, 0x4001100c, 4); */
                /* DD(sl, "GPIOC_ODR = 0x%08x", read_uint32(sl->q_buf, 0)); */
-               delay(100);
+               usleep(100 * 1000);
 
-               clear_buf(sl);
+               memset(sl->q_buf, 0, sizeof(sl->q_buf));
                stlink_write_mem32(sl, GPIOC_ODR, 4); // PC lo
-               delay(100);
+        usleep(100 * 1000);
        }
        write_uint32(sl->q_buf, io_conf); // set old state
 
@@ -131,10 +133,10 @@ int main(int argc, char *argv[]) {
        fputs("\n++++++++++ read/write 8bit, sram at 0x2000 0000 ++++++++++++++++\n\n", stderr);
     memset(sl->q_buf, 0, sizeof(sl->q_buf));
     mark_buf(sl);
-       stlink_write_mem8(sl, 0x20000000, 16);
+       //stlink_write_mem8(sl, 0x20000000, 16);
 
-       stlink_write_mem8(sl, 0x20000000, 1);
-       stlink_write_mem8(sl, 0x20000001, 1);
+       //stlink_write_mem8(sl, 0x20000000, 1);
+       //stlink_write_mem8(sl, 0x20000001, 1);
        stlink_write_mem8(sl, 0x2000000b, 3);
        stlink_read_mem32(sl, 0x20000000, 16);
 #endif
@@ -156,7 +158,7 @@ int main(int argc, char *argv[]) {
        stlink_write_mem32(sl, 0x20000000, 17);
        stlink_read_mem32(sl, 0x20000000, 32);
 #endif
-#if 1
+#if 0
        // sram 0x20000000 8kB
        fputs("++++++++++ read/write 32bit, sram at 0x2000 0000 ++++++++++++\n", stderr);
     memset(sl->q_buf, 0, sizeof(sl->q_buf));
@@ -169,13 +171,14 @@ int main(int argc, char *argv[]) {
        stlink_read_mem32(sl, 0x20000000, 1024 * 6);
        stlink_read_mem32(sl, 0x20000000 + 1024 * 6, 1024 * 2);
 #endif
-#if 0
-       stlink_read_all_regs(sl);
+#if 1
+    reg regs;
+       stlink_read_all_regs(sl, &regs);
        stlink_step(sl);
        fputs("++++++++++ write r0 = 0x12345678\n", stderr);
        stlink_write_reg(sl, 0x12345678, 0);
-       stlink_read_reg(sl, 0);
-       stlink_read_all_regs(sl);
+       stlink_read_reg(sl, 0, &regs);
+       stlink_read_all_regs(sl, &regs);
 #endif
 #if 0
        stlink_run(sl);