use COMMAND_HANDLER macro to define all commands
[fw/openocd] / src / target / xscale.h
index fd4bddf21375207e7e3e2c80057df958295a2c84..433ecfcf03a76620aad710c772567958f3bf8814 100644 (file)
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
 
 #define        XSCALE_COMMON_MAGIC 0x58534341
 
-typedef struct xscale_jtag_s
-{
-       /* position in JTAG scan chain */
-       jtag_tap_t *tap;
-
-       /* IR length and instructions */        
-       int ir_length;
-       u32 dbgrx;
-       u32 dbgtx;
-       u32 ldic;
-       u32 dcsr;
-} xscale_jtag_t;
+/* These four JTAG instructions are architecturally defined.
+ * Lengths are core-specific; originally 5 bits, later 7.
+ */
+#define XSCALE_DBGRX   0x02
+#define XSCALE_DBGTX   0x10
+#define XSCALE_LDIC    0x07
+#define XSCALE_SELDCSR 0x09
 
 enum xscale_debug_reason
 {
@@ -65,9 +60,9 @@ typedef struct xscale_trace_data_s
 {
        xscale_trace_entry_t *entries;
        int depth;
-       u32 chkpt0;
-       u32 chkpt1;
-       u32 last_instruction;
+       uint32_t chkpt0;
+       uint32_t chkpt1;
+       uint32_t last_instruction;
        struct xscale_trace_data_s *next;
 } xscale_trace_data_t;
 
@@ -79,44 +74,40 @@ typedef struct xscale_trace_s
        int buffer_enabled;                             /* whether trace buffer is enabled */
        int buffer_fill;                                /* maximum number of trace runs to read (-1 for wrap-around) */
        int pc_ok;
-       u32 current_pc;
+       uint32_t current_pc;
        armv4_5_state_t core_state;             /* current core state (ARM, Thumb, Jazelle) */
 } xscale_trace_t;
 
 typedef struct xscale_common_s
 {
+       /* armv4/5 common stuff */
+       armv4_5_common_t armv4_5_common;
+
        int common_magic;
-       
+
        /* XScale registers (CP15, DBG) */
        reg_cache_t *reg_cache;
 
-       /* pxa250, pxa255, pxa27x, ixp42x, ... */
-       char *variant;
-
-       xscale_jtag_t jtag_info;
-       
        /* current state of the debug handler */
-       int handler_installed;
-       int handler_running;
-       u32 handler_address;
-       
+       uint32_t handler_address;
+
        /* target-endian buffers with exception vectors */
-       u32 low_vectors[8];
-       u32 high_vectors[8];
-       
+       uint32_t low_vectors[8];
+       uint32_t high_vectors[8];
+
        /* static low vectors */
        uint8_t static_low_vectors_set; /* bit field with static vectors set by the user */
        uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
-       u32 static_low_vectors[8];
-       u32 static_high_vectors[8];
+       uint32_t static_low_vectors[8];
+       uint32_t static_high_vectors[8];
+
+       /* DCache cleaning */
+       uint32_t cache_clean_address;
 
-       /* DCache cleaning */   
-       u32 cache_clean_address;
-       
        /* whether hold_rst and ext_dbg_break should be set */
        int hold_rst;
        int external_debug_break;
-       
+
        /* breakpoint / watchpoint handling */
        int dbr_available;
        int dbr0_used;
@@ -124,28 +115,29 @@ typedef struct xscale_common_s
        int ibcr_available;
        int ibcr0_used;
        int     ibcr1_used;
-       u32 arm_bkpt;
+       uint32_t arm_bkpt;
        uint16_t thumb_bkpt;
-       
+
        uint8_t vector_catch;
 
        xscale_trace_t trace;
-       
+
        int arch_debug_reason;
-       
-       /* armv4/5 common stuff */
-       armv4_5_common_t armv4_5_common;
-       
+
        /* MMU/Caches */
        armv4_5_mmu_common_t armv4_5_mmu;
-       u32 cp15_control_reg;
-       
-       /* possible future enhancements that go beyond XScale common stuff */
-       void *arch_info;
-       
+       uint32_t cp15_control_reg;
+
        int fast_memory_access;
 } xscale_common_t;
 
+static inline struct xscale_common_s *
+target_to_xscale(struct target_s *target)
+{
+       return container_of(target->arch_info, struct xscale_common_s,
+                       armv4_5_common);
+}
+
 typedef struct xscale_reg_s
 {
        int dbg_handler_number;