* Copyright (C) 2006, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
+ * Copyright (C) 2007,2008 Øyvind Harboe *
+ * oyvind.harboe@zylin.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
#include "xscale.h"
+#include "arm7_9_common.h"
#include "register.h"
#include "target.h"
#include "armv4_5.h"
/* forward declarations */
int xscale_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
int xscale_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int xscale_quit();
+int xscale_quit(void);
int xscale_arch_state(struct target_s *target);
int xscale_poll(target_t *target);
int xscale_assert_reset(target_t *target);
int xscale_deassert_reset(target_t *target);
int xscale_soft_reset_halt(struct target_s *target);
-int xscale_prepare_reset_halt(struct target_s *target);
int xscale_set_reg_u32(reg_t *reg, u32 value);
int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
-int xscale_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
.assert_reset = xscale_assert_reset,
.deassert_reset = xscale_deassert_reset,
.soft_reset_halt = xscale_soft_reset_halt,
- .prepare_reset_halt = xscale_prepare_reset_halt,
.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
.read_memory = xscale_read_memory,
.write_memory = xscale_write_memory,
.bulk_write_memory = xscale_bulk_write_memory,
- .checksum_memory = xscale_checksum_memory,
-
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
.run_algorithm = armv4_5_run_algorithm,
.add_breakpoint = xscale_add_breakpoint,
for (;;)
{
- int i;
- for (i=0; i<100; i++)
+ /* if we want to consume the register content (i.e. clear TX_READY),
+ * we have to go straight from Capture-DR to Shift-DR
+ * otherwise, we go from Capture-DR to Exit1-DR to Pause-DR
+ */
+ if (consume)
+ jtag_add_pathmove(3, path);
+ else
{
- /* if we want to consume the register content (i.e. clear TX_READY),
- * we have to go straight from Capture-DR to Shift-DR
- * otherwise, we go from Capture-DR to Exit1-DR to Pause-DR
- */
- if (consume)
- jtag_add_pathmove(3, path);
- else
- {
- jtag_add_pathmove(sizeof(noconsume_path)/sizeof(*noconsume_path), noconsume_path);
- }
-
- jtag_add_dr_scan(3, fields, TAP_RTI);
-
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
- LOG_ERROR("JTAG error while reading TX");
- return ERROR_TARGET_TIMEOUT;
- }
-
- gettimeofday(&now, NULL);
- if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
- {
- LOG_ERROR("time out reading TX register");
- return ERROR_TARGET_TIMEOUT;
- }
- if (!((!(field0_in & 1)) && consume))
- {
- goto done;
- }
+ jtag_add_pathmove(sizeof(noconsume_path)/sizeof(*noconsume_path), noconsume_path);
+ }
+
+ jtag_add_dr_scan(3, fields, TAP_RTI);
+
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ LOG_ERROR("JTAG error while reading TX");
+ return ERROR_TARGET_TIMEOUT;
+ }
+
+ gettimeofday(&now, NULL);
+ if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
+ {
+ LOG_ERROR("time out reading TX register");
+ return ERROR_TARGET_TIMEOUT;
+ }
+ if (!((!(field0_in & 1)) && consume))
+ {
+ goto done;
+ }
+ if (debug_level>=3)
+ {
+ LOG_DEBUG("waiting 100ms");
+ alive_sleep(100); /* avoid flooding the logs */
+ } else
+ {
+ keep_alive();
}
- LOG_DEBUG("waiting 10ms");
- usleep(10*1000); /* avoid flooding the logs */
}
done:
LOG_DEBUG("polling RX");
for (;;)
{
- int i;
- for (i=0; i<10; i++)
+ jtag_add_dr_scan(3, fields, TAP_RTI);
+
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
{
- jtag_add_dr_scan(3, fields, TAP_RTI);
-
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
- LOG_ERROR("JTAG error while writing RX");
- return retval;
- }
-
- gettimeofday(&now, NULL);
- if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
- {
- LOG_ERROR("time out writing RX register");
- return ERROR_TARGET_TIMEOUT;
- }
- if (!(field0_in & 1))
- goto done;
+ LOG_ERROR("JTAG error while writing RX");
+ return retval;
+ }
+
+ gettimeofday(&now, NULL);
+ if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec)&& (now.tv_usec > timeout.tv_usec)))
+ {
+ LOG_ERROR("time out writing RX register");
+ return ERROR_TARGET_TIMEOUT;
+ }
+ if (!(field0_in & 1))
+ goto done;
+ if (debug_level>=3)
+ {
+ LOG_DEBUG("waiting 100ms");
+ alive_sleep(100); /* avoid flooding the logs */
+ } else
+ {
+ keep_alive();
}
- LOG_DEBUG("waiting 10ms");
- usleep(10*1000); /* wait 10ms to avoid flooding the logs */
}
done:
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
+ u32 t[3];
+ int bits[3];
int retval;
int done_count = 0;
- u8 output[4] = {0, 0, 0, 0};
-
- scan_field_t fields[3];
- u8 field0_out = 0x0;
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x6;
- u8 field2 = 0x1;
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
-
+
jtag_add_end_state(TAP_RTI);
xscale_jtag_set_instr(xscale->jtag_info.chain_pos, xscale->jtag_info.dbgrx);
- fields[0].device = xscale->jtag_info.chain_pos;
- fields[0].num_bits = 3;
- fields[0].out_value = &field0_out;
- fields[0].out_mask = NULL;
- fields[0].in_handler = NULL;
- fields[0].in_value = NULL;
- if (!xscale->fast_memory_access)
- {
- jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
- }
-
- fields[1].device = xscale->jtag_info.chain_pos;
- fields[1].num_bits = 32;
- fields[1].out_value = output;
- fields[1].out_mask = NULL;
- fields[1].in_value = NULL;
- fields[1].in_handler = NULL;
- fields[1].in_handler_priv = NULL;
- fields[1].in_check_value = NULL;
- fields[1].in_check_mask = NULL;
-
-
-
- fields[2].device = xscale->jtag_info.chain_pos;
- fields[2].num_bits = 1;
- fields[2].out_value = &field2;
- fields[2].out_mask = NULL;
- fields[2].in_value = NULL;
- fields[2].in_handler = NULL;
- if (!xscale->fast_memory_access)
- {
- jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
- }
-
- if (size==4)
+ bits[0]=3;
+ t[0]=0;
+ bits[1]=32;
+ t[2]=1;
+ bits[2]=1;
+ int endianness = target->endianness;
+ while (done_count++ < count)
{
- int endianness = target->endianness;
- while (done_count++ < count)
+ switch (size)
{
+ case 4:
if (endianness == TARGET_LITTLE_ENDIAN)
{
- output[0]=buffer[0];
- output[1]=buffer[1];
- output[2]=buffer[2];
- output[3]=buffer[3];
+ t[1]=le_to_h_u32(buffer);
} else
{
- output[0]=buffer[3];
- output[1]=buffer[2];
- output[2]=buffer[1];
- output[3]=buffer[0];
+ t[1]=be_to_h_u32(buffer);
}
- jtag_add_dr_scan(3, fields, TAP_RTI);
- buffer += size;
- }
-
- } else
- {
- while (done_count++ < count)
- {
- /* extract sized element from target-endian buffer, and put it
- * into little-endian output buffer
- */
- switch (size)
+ break;
+ case 2:
+ if (endianness == TARGET_LITTLE_ENDIAN)
{
- case 2:
- buf_set_u32(output, 0, 32, target_buffer_get_u16(target, buffer));
- break;
- case 1:
- output[0] = *buffer;
- break;
- default:
- LOG_ERROR("BUG: size neither 4, 2 nor 1");
- exit(-1);
+ t[1]=le_to_h_u16(buffer);
+ } else
+ {
+ t[1]=be_to_h_u16(buffer);
}
-
- jtag_add_dr_scan(3, fields, TAP_RTI);
- buffer += size;
+ break;
+ case 1:
+ t[1]=buffer[0];
+ break;
+ default:
+ LOG_ERROR("BUG: size neither 4, 2 nor 1");
+ exit(-1);
}
-
+ jtag_add_dr_out(xscale->jtag_info.chain_pos,
+ 3,
+ bits,
+ t,
+ TAP_RTI);
+ buffer += size;
}
if ((retval = jtag_execute_queue()) != ERROR_OK)
else
armv4_5->core_state = ARMV4_5_STATE_ARM;
+
+ if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+ return ERROR_FAIL;
+
/* get banked registers, r8 to r14, and spsr if not in USR/SYS mode */
if ((armv4_5->core_mode != ARMV4_5_MODE_USR) && (armv4_5->core_mode != ARMV4_5_MODE_SYS))
{
if (target->state == TARGET_HALTED)
{
- LOG_WARNING("target was already halted");
+ LOG_DEBUG("target was already halted");
return ERROR_OK;
}
else if (target->state == TARGET_UNKNOWN)
LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
- /* TRST every time. We want to be able to support daemon_startup attach */
- jtag_add_reset(1, 0);
- jtag_add_sleep(5000);
- jtag_add_reset(0, 0);
- jtag_add_sleep(5000);
- jtag_execute_queue();
-
-
-
/* select DCSR instruction (set endstate to R-T-I to ensure we don't
* end up in T-L-R, which would reset JTAG
*/
target->state = TARGET_RESET;
+ if (target->reset_halt)
+ {
+ int retval;
+ if ((retval = target_halt(target))!=ERROR_OK)
+ return retval;
+ }
+
return ERROR_OK;
}
xscale_write_dcsr(target, 0, 1);
target->state = TARGET_RUNNING;
- if ((target->reset_mode != RESET_HALT) && (target->reset_mode != RESET_INIT))
+ if (!target->reset_halt)
{
jtag_add_sleep(10000);
return ERROR_OK;
}
-int xscale_prepare_reset_halt(struct target_s *target)
-{
- /* nothing to be done for reset_halt on XScale targets
- * we always halt after a reset to upload the debug handler
- */
- return ERROR_OK;
-}
-
int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
{
return xscale_write_memory(target, address, 4, count, buffer);
}
-int xscale_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum)
-{
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-}
-
u32 xscale_get_ttb(target_t *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
return ERROR_OK;
}
-int xscale_quit()
+int xscale_quit(void)
{
return ERROR_OK;
xscale->armv4_5_mmu.has_tiny_pages = 1;
xscale->armv4_5_mmu.mmu_enabled = 0;
- xscale->fast_memory_access = 0;
-
return ERROR_OK;
}
return ERROR_OK;
}
-int handle_xscale_fast_memory_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
- target_t *target = get_current_target(cmd_ctx);
- armv4_5_common_t *armv4_5;
- xscale_common_t *xscale;
-
- if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK)
- {
- return ERROR_OK;
- }
-
- if (argc == 1)
- {
- if (strcmp("enable", args[0]) == 0)
- {
- xscale->fast_memory_access = 1;
- }
- else if (strcmp("disable", args[0]) == 0)
- {
- xscale->fast_memory_access = 0;
- }
- else
- {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- } else if (argc!=0)
- {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(cmd_ctx, "fast memory access is %s", (xscale->fast_memory_access) ? "enabled" : "disabled");
-
- return ERROR_OK;
-}
-
int xscale_register_commands(struct command_context_s *cmd_ctx)
{
command_t *xscale_cmd;
COMMAND_EXEC, "load image from <file> [base address]");
register_command(cmd_ctx, xscale_cmd, "cp15", xscale_handle_cp15, COMMAND_EXEC, "access coproc 15 <register> [value]");
- register_command(cmd_ctx, xscale_cmd, "fast_memory_access", handle_xscale_fast_memory_access_command,
- COMMAND_ANY, "use fast memory accesses instead of slower but potentially unsafe slow accesses <enable|disable>");
-
armv4_5_register_commands(cmd_ctx);
projects / fw / openocd / blobdiff