1:
mrc p14, 0, r15, c14, c0, 0
bvs 1b
- mcr p14, 0, \reg, c8, c0, 0
+ mcr p14, 0, \reg, c8, c0, 0
.endm
@ receive word from debugger
1:
mrc p14, 0, r15, c14, c0, 0
bpl 1b
- mrc p14, 0, \reg, c9, c0, 0
+ mrc p14, 0, \reg, c9, c0, 0
.endm
@ save register on debugger, small
mrc p14, 0, r13, c10, c0
@ check if global enable bit (GE) is set
ands r13, r13, #0x80000000
-
+
bne debug_handler
@ set global enable bit (GE)
cmp r1, #MODE_USR
bne not_user_mode
-
+
@ replace USR mode with SYS
bic r0, r0, #MODE_MASK
orr r0, r0, #MODE_SYS
@ wait for command from debugger, than execute desired function
get_command:
bl receive_from_debugger
-
+
@ 0x0n - register access
cmp r0, #0x0
beq get_banked_registers
@ 0x2n - write memory
cmp r0, #0x21
beq write_byte
-
+
cmp r0, #0x22
beq write_half_word
-
+
cmp r0, #0x24
beq write_word
cmp r0, #0x51
beq invalidate_d_cache
-
+
cmp r0, #0x52
beq invalidate_i_cache
cmp r0, #0x61
beq read_trace_buffer
-
+
cmp r0, #0x62
beq clean_trace_buffer
-
+
@ return (back to get_command)
b get_command
m_receive_from_debugger lr
@ branch back to application code, restoring CPSR
- subs pc, lr, #0
+ subs pc, lr, #0
@ get banked registers
-@ receive mode bits from host, then run into save_banked_registers to
-
+@ receive mode bits from host, then run into save_banked_registers to
+
get_banked_registers:
bl receive_from_debugger
@ keep current mode bits in r1 for later use
and r1, r0, #MODE_MASK
-
+
@ backup banked registers
m_send_to_debugger r8
m_send_to_debugger r9
@ if not in SYS mode (or USR, which we replaced with SYS before)
cmp r1, #MODE_SYS
-
+
beq no_spsr_to_save
@ backup SPSR
@ set banked registers
-@ receive mode bits from host, then run into save_banked_registers to
-
+@ receive mode bits from host, then run into save_banked_registers to
+
set_banked_registers:
bl receive_from_debugger
@ keep current mode bits in r1 for later use
and r1, r0, #MODE_MASK
-
+
@ set banked registers
m_receive_from_debugger r8
m_receive_from_debugger r9
@ if not in SYS mode (or USR, which we replaced with SYS before)
cmp r1, #MODE_SYS
-
+
beq no_spsr_to_restore
@ set SPSR
rb_loop:
ldrb r0, [r2], #1
-
+
@ drain write- (and fill-) buffer to work around XScale errata
mcr p15, 0, r8, c7, c10, 4
subs r1, r1, #1
bne rb_loop
-
+
@ return
b get_command
rh_loop:
ldrh r0, [r2], #2
-
+
@ drain write- (and fill-) buffer to work around XScale errata
mcr p15, 0, r8, c7, c10, 4
subs r1, r1, #1
bne rh_loop
-
+
@ return
b get_command
rw_loop:
ldr r0, [r2], #4
-
+
@ drain write- (and fill-) buffer to work around XScale errata
mcr p15, 0, r8, c7, c10, 4
subs r1, r1, #1
bne rw_loop
-
+
@ return
b get_command
subs r1, r1, #1
bne wb_loop
-
+
@ return
b get_command
subs r1, r1, #1
bne wh_loop
-
+
@ return
b get_command
subs r1, r1, #1
bne ww_loop
-
+
@ return
b get_command
clear_sa:
@ read DCSR
mrc p14, 0, r0, c10, c0
-
+
@ clear SA bit
bic r0, r0, #0x20
clean_d_cache:
@ r0: cache clean area
bl receive_from_debugger
-
+
mov r1, #1024
clean_loop:
mcr p15, 0, r0, c7, c2, 5
b read_cp_reg_reply
read_cp_reg_reply:
- bl send_to_debugger
+ bl send_to_debugger
@ return
b get_command
@ dump checkpoint register 0
mrc p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0 (0x10)
bl send_to_debugger
-
+
@ dump checkpoint register 1
mrc p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1 (0x11)
bl send_to_debugger
@ return
b get_command
-
+
@ ----
clean_trace_buffer:
@ return
b get_command
-
+
@ ----
mcr p14, 0, r13, c10, c0, 0 @ XSCALE_DCSR
@ branch back to application code, restoring CPSR
- subs pc, lr, #0
+ subs pc, lr, #0
undef_handler:
swi_handler:
projects / fw / openocd / blobdiff