* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
* This program is free software; you can redistribute it and/or modify
- * it under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* Contact Information:
* Intel Corporation
uint32_t addr, uint8_t *buf);
static int write_mem(struct target *t, uint32_t size,
uint32_t addr, const uint8_t *buf);
-static int calcaddr_pyhsfromlin(struct target *t, uint32_t addr,
- uint32_t *physaddr);
+static int calcaddr_physfromlin(struct target *t, target_addr_t addr,
+ target_addr_t *physaddr);
static int read_phys_mem(struct target *t, uint32_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer);
static int write_phys_mem(struct target *t, uint32_t phys_address,
return ERROR_OK;
}
-int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physical)
+int x86_32_common_virt2phys(struct target *t, target_addr_t address, target_addr_t *physical)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
} else {
/* target halted in protected mode */
- if (calcaddr_pyhsfromlin(t, address, physical) != ERROR_OK) {
- LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32,
+ if (calcaddr_physfromlin(t, address, physical) != ERROR_OK) {
+ LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
__func__, address);
return ERROR_FAIL;
}
return ERROR_OK;
}
-int x86_32_common_read_phys_mem(struct target *t, uint32_t phys_address,
+int x86_32_common_read_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
{
int retval = ERROR_OK;
bool pg_disabled = false;
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, count=%d, buf=%p",
+ LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
phys_address, size, count, buffer);
struct x86_32_common *x86_32 = target_to_x86_32(t);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
if (!count || !buffer || !phys_address) {
- LOG_ERROR("%s invalid params count=%d, buf=%p, addr=%08" PRIx32,
+ LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
__func__, count, buffer, phys_address);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
/* to access physical memory, switch off the CR0.PG bit */
if (x86_32->is_paging_enabled(t)) {
retval = x86_32->disable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
return retval;
+ }
pg_disabled = true;
}
LOG_ERROR("%s invalid read size", __func__);
break;
}
+ if (retval != ERROR_OK)
+ break;
}
/* restore CR0.PG bit if needed (regardless of retval) */
if (pg_disabled) {
- retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK)
- return retval;
- pg_disabled = true;
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
+ return retval2;
+ }
}
/* TODO: After reading memory from target, we must replace
* software breakpoints with the original instructions again.
return retval;
}
-int x86_32_common_write_phys_mem(struct target *t, uint32_t phys_address,
+int x86_32_common_write_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
check_not_halted(t);
if (!count || !buffer || !phys_address) {
- LOG_ERROR("%s invalid params count=%d, buf=%p, addr=%08" PRIx32,
+ LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buffer, phys_address);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
int retval = ERROR_OK;
bool pg_disabled = false;
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, count=%d, buf=%p",
+ LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
phys_address, size, count, buffer);
check_not_halted(t);
if (!count || !buffer || !phys_address) {
- LOG_ERROR("%s invalid params count=%d, buf=%p, addr=%08" PRIx32,
+ LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
__func__, count, buffer, phys_address);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
/* to access physical memory, switch off the CR0.PG bit */
if (x86_32->is_paging_enabled(t)) {
retval = x86_32->disable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
return retval;
+ }
pg_disabled = true;
}
for (uint32_t i = 0; i < count; i++) {
/* restore CR0.PG bit if needed (regardless of retval) */
if (pg_disabled) {
retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
return retval;
+ }
}
return retval;
}
break;
}
+ if (retval != ERROR_OK)
+ return retval;
+
/* read_hw_reg() will write to 4 bytes (uint32_t)
* Watch out, the buffer passed into read_mem() might be 1 or 2 bytes.
*/
LOG_ERROR("%s invalid write mem size", __func__);
return ERROR_FAIL;
}
+
+ if (retval != ERROR_OK)
+ return retval;
+
retval = x86_32->transaction_status(t);
if (retval != ERROR_OK) {
LOG_ERROR("%s error on mem write", __func__);
return retval;
}
-int calcaddr_pyhsfromlin(struct target *t, uint32_t addr, uint32_t *physaddr)
+int calcaddr_physfromlin(struct target *t, target_addr_t addr, target_addr_t *physaddr)
{
uint8_t entry_buffer[8];
return ERROR_OK;
}
-int x86_32_common_read_memory(struct target *t, uint32_t addr,
+int x86_32_common_read_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, uint8_t *buf)
{
int retval = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, count=%d, buf=%p",
+ LOG_DEBUG("addr=" TARGET_ADDR_FMT ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
addr, size, count, buf);
check_not_halted(t);
if (!count || !buf || !addr) {
- LOG_ERROR("%s invalid params count=%d, buf=%p, addr=%08" PRIx32,
+ LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buf, addr);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
* conversion to physical address space needed
*/
retval = x86_32->disable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
return retval;
- uint32_t physaddr = 0;
- if (calcaddr_pyhsfromlin(t, addr, &physaddr) != ERROR_OK) {
- LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32, __func__, addr);
+ }
+ target_addr_t physaddr = 0;
+ if (calcaddr_physfromlin(t, addr, &physaddr) != ERROR_OK) {
+ LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
+ __func__, addr);
retval = ERROR_FAIL;
}
/* TODO: !!! Watch out for page boundaries
if (retval == ERROR_OK
&& x86_32_common_read_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
- LOG_ERROR("%s failed to read memory from physical address 0x%08" PRIx32, __func__, physaddr);
- retval = ERROR_FAIL;
+ LOG_ERROR("%s failed to read memory from physical address " TARGET_ADDR_FMT,
+ __func__, physaddr);
}
/* restore PG bit if it was cleared prior (regardless of retval) */
retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
return retval;
+ }
} else {
/* paging is off - linear address is physical address */
if (x86_32_common_read_phys_mem(t, addr, size, count, buf) != ERROR_OK) {
- LOG_ERROR("%s failed to read memory from address 0%08" PRIx32, __func__, addr);
+ LOG_ERROR("%s failed to read memory from address " TARGET_ADDR_FMT,
+ __func__, addr);
retval = ERROR_FAIL;
}
}
return retval;
}
-int x86_32_common_write_memory(struct target *t, uint32_t addr,
+int x86_32_common_write_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, const uint8_t *buf)
{
int retval = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, count=%d, buf=%p",
+ LOG_DEBUG("addr=" TARGET_ADDR_FMT ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
addr, size, count, buf);
check_not_halted(t);
if (!count || !buf || !addr) {
- LOG_ERROR("%s invalid params count=%d, buf=%p, addr=%08" PRIx32,
+ LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buf, addr);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
* conversion to physical address space needed
*/
retval = x86_32->disable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
return retval;
- uint32_t physaddr = 0;
- if (calcaddr_pyhsfromlin(t, addr, &physaddr) != ERROR_OK) {
- LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32,
+ }
+ target_addr_t physaddr = 0;
+ if (calcaddr_physfromlin(t, addr, &physaddr) != ERROR_OK) {
+ LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
*/
if (retval == ERROR_OK
&& x86_32_common_write_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
- LOG_ERROR("%s failed to write memory to physical address 0x%08" PRIx32,
+ LOG_ERROR("%s failed to write memory to physical address " TARGET_ADDR_FMT,
__func__, physaddr);
- retval = ERROR_FAIL;
}
/* restore PG bit if it was cleared prior (regardless of retval) */
retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
return retval;
+ }
} else {
/* paging is off - linear address is physical address */
if (x86_32_common_write_phys_mem(t, addr, size, count, buf) != ERROR_OK) {
- LOG_ERROR("%s failed to write memory to address 0x%08" PRIx32,
+ LOG_ERROR("%s failed to write memory to address " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
/* if CS.D bit=1 then its a 32 bit code segment, else 16 */
bool use32 = (buf_get_u32(x86_32->cache->reg_list[CSAR].value, 0, 32)) & CSAR_D;
int retval = ERROR_FAIL;
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, buf=%p", addr, size, buf);
+ bool pg_disabled = false;
+ LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", buf=%p", addr, size, buf);
check_not_halted(t);
if (!buf || !addr) {
LOG_ERROR("%s invalid params buf=%p, addr=%08" PRIx32, __func__, buf, addr);
LOG_ERROR("%s error EDX write", __func__);
return retval;
}
+ /* to access physical memory, switch off the CR0.PG bit */
+ if (x86_32->is_paging_enabled(t)) {
+ retval = x86_32->disable_paging(t);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
+ return retval;
+ }
+ pg_disabled = true;
+ }
switch (size) {
case BYTE:
if (use32)
LOG_ERROR("%s invalid read io size", __func__);
return ERROR_FAIL;
}
+
+ /* restore CR0.PG bit if needed */
+ if (pg_disabled) {
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
+ return retval2;
+ }
+ }
+
+ if (retval != ERROR_OK)
+ return retval;
+
uint32_t regval = 0;
retval = x86_32->read_hw_reg(t, EAX, ®val, 0);
if (retval != ERROR_OK) {
struct x86_32_common *x86_32 = target_to_x86_32(t);
/* if CS.D bit=1 then its a 32 bit code segment, else 16 */
bool use32 = (buf_get_u32(x86_32->cache->reg_list[CSAR].value, 0, 32)) & CSAR_D;
- LOG_DEBUG("addr=%08" PRIx32 ", size=%d, buf=%p", addr, size, buf);
+ LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", buf=%p", addr, size, buf);
check_not_halted(t);
int retval = ERROR_FAIL;
+ bool pg_disabled = false;
if (!buf || !addr) {
- LOG_ERROR("%s invalid params buf=%p, addr=%08" PRIx32, __func__, buf, addr);
+ LOG_ERROR("%s invalid params buf=%p, addr=0x%08" PRIx32, __func__, buf, addr);
return retval;
}
/* no do the write */
LOG_ERROR("%s error on EAX write", __func__);
return retval;
}
+ /* to access physical memory, switch off the CR0.PG bit */
+ if (x86_32->is_paging_enabled(t)) {
+ retval = x86_32->disable_paging(t);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("%s could not disable paging", __func__);
+ return retval;
+ }
+ pg_disabled = true;
+ }
switch (size) {
case BYTE:
if (use32)
LOG_ERROR("%s invalid write io size", __func__);
return ERROR_FAIL;
}
+
+ /* restore CR0.PG bit if needed */
+ if (pg_disabled) {
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
+ LOG_ERROR("%s could not enable paging", __func__);
+ return retval2;
+ }
+ }
+
+ if (retval != ERROR_OK)
+ return retval;
+
retval = x86_32->transaction_status(t);
if (retval != ERROR_OK) {
LOG_ERROR("%s error on io write", __func__);
int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp)
{
- LOG_DEBUG("type=%d, addr=%08" PRIx32, bp->type, bp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
/* set_breakpoint() will return ERROR_TARGET_RESOURCE_NOT_AVAILABLE if all
int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp)
{
- LOG_DEBUG("type=%d, addr=%08" PRIx32, bp->type, bp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
if (bp->set)
uint8_t bp_num, uint8_t bp_type, uint8_t bp_length)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("addr=%08" PRIx32 ", bp_num=%d, bp_type=%d, pb_length=%d",
+ LOG_DEBUG("addr=0x%08" PRIx32 ", bp_num=%" PRIu8 ", bp_type=%" PRIu8 ", pb_length=%" PRIu8,
address, bp_num, bp_type, bp_length);
/* DR7 - set global enable */
* when we exit PM
*/
buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, address);
- x86_32->cache->reg_list[bp_num+DR0].dirty = 1;
- x86_32->cache->reg_list[bp_num+DR0].valid = 1;
+ x86_32->cache->reg_list[bp_num+DR0].dirty = true;
+ x86_32->cache->reg_list[bp_num+DR0].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6);
- x86_32->cache->reg_list[DR6].dirty = 1;
- x86_32->cache->reg_list[DR6].valid = 1;
+ x86_32->cache->reg_list[DR6].dirty = true;
+ x86_32->cache->reg_list[DR6].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7);
- x86_32->cache->reg_list[DR7].dirty = 1;
- x86_32->cache->reg_list[DR7].valid = 1;
+ x86_32->cache->reg_list[DR7].dirty = true;
+ x86_32->cache->reg_list[DR7].valid = true;
return ERROR_OK;
}
static int unset_debug_regs(struct target *t, uint8_t bp_num)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("bp_num=%d", bp_num);
+ LOG_DEBUG("bp_num=%" PRIu8, bp_num);
uint32_t dr7 = buf_get_u32(x86_32->cache->reg_list[DR7].value, 0, 32);
if (!(DR7_BP_FREE(dr7, bp_num))) {
DR7_GLOBAL_DISABLE(dr7, bp_num);
} else {
- LOG_ERROR("%s dr7 error, not enabled, val=%08" PRIx32, __func__, dr7);
+ LOG_ERROR("%s dr7 error, not enabled, val=0x%08" PRIx32, __func__, dr7);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
/* this will clear rw and len bits */
* when we exit PM
*/
buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, 0);
- x86_32->cache->reg_list[bp_num+DR0].dirty = 1;
- x86_32->cache->reg_list[bp_num+DR0].valid = 1;
+ x86_32->cache->reg_list[bp_num+DR0].dirty = true;
+ x86_32->cache->reg_list[bp_num+DR0].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6);
- x86_32->cache->reg_list[DR6].dirty = 1;
- x86_32->cache->reg_list[DR6].valid = 1;
+ x86_32->cache->reg_list[DR6].dirty = true;
+ x86_32->cache->reg_list[DR6].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7);
- x86_32->cache->reg_list[DR7].dirty = 1;
- x86_32->cache->reg_list[DR7].valid = 1;
+ x86_32->cache->reg_list[DR7].dirty = true;
+ x86_32->cache->reg_list[DR7].valid = true;
return ERROR_OK;
}
while (debug_reg_list[hwbp_num].used && (hwbp_num < x86_32->num_hw_bpoints))
hwbp_num++;
if (hwbp_num >= x86_32->num_hw_bpoints) {
- LOG_ERROR("%s no free hw breakpoint bpid=%d", __func__, bp->unique_id);
+ LOG_ERROR("%s no free hw breakpoint bpid=0x%" PRIx32, __func__, bp->unique_id);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if (set_debug_regs(t, bp->address, hwbp_num, DR7_BP_EXECUTE, 1) != ERROR_OK)
bp->set = hwbp_num + 1;
debug_reg_list[hwbp_num].used = 1;
debug_reg_list[hwbp_num].bp_value = bp->address;
- LOG_USER("%s hardware breakpoint %d set at 0x%08" PRIx32 " (hwreg=%d)", __func__,
+ LOG_USER("%s hardware breakpoint %" PRIu32 " set at 0x%08" PRIx32 " (hwreg=%" PRIu8 ")", __func__,
bp->unique_id, debug_reg_list[hwbp_num].bp_value, hwbp_num);
return ERROR_OK;
}
int hwbp_num = bp->set - 1;
if ((hwbp_num < 0) || (hwbp_num >= x86_32->num_hw_bpoints)) {
- LOG_ERROR("%s invalid breakpoint number=%d, bpid=%d",
+ LOG_ERROR("%s invalid breakpoint number=%d, bpid=%" PRIu32,
__func__, hwbp_num, bp->unique_id);
return ERROR_OK;
}
debug_reg_list[hwbp_num].used = 0;
debug_reg_list[hwbp_num].bp_value = 0;
- LOG_USER("%s hardware breakpoint %d removed from 0x%08" PRIx32 " (hwreg=%d)",
+ LOG_USER("%s hardware breakpoint %" PRIu32 " removed from " TARGET_ADDR_FMT " (hwreg=%d)",
__func__, bp->unique_id, bp->address, hwbp_num);
return ERROR_OK;
}
static int set_swbp(struct target *t, struct breakpoint *bp)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("id %d", bp->unique_id);
- uint32_t physaddr;
+ LOG_DEBUG("id %" PRIx32, bp->unique_id);
+ target_addr_t physaddr;
uint8_t opcode = SW_BP_OPCODE;
uint8_t readback;
- if (calcaddr_pyhsfromlin(t, bp->address, &physaddr) != ERROR_OK)
+ if (calcaddr_physfromlin(t, bp->address, &physaddr) != ERROR_OK)
return ERROR_FAIL;
if (read_phys_mem(t, physaddr, 1, 1, bp->orig_instr))
return ERROR_FAIL;
- LOG_DEBUG("set software breakpoint - orig byte=%02" PRIx8 "", *bp->orig_instr);
+ LOG_DEBUG("set software breakpoint - orig byte=0x%02" PRIx8 "", *bp->orig_instr);
/* just write the instruction trap byte */
if (write_phys_mem(t, physaddr, 1, 1, &opcode))
return ERROR_FAIL;
if (readback != SW_BP_OPCODE) {
- LOG_ERROR("%s software breakpoint error at 0x%08" PRIx32 ", check memory",
+ LOG_ERROR("%s software breakpoint error at " TARGET_ADDR_FMT ", check memory",
__func__, bp->address);
- LOG_ERROR("%s readback=%02" PRIx8 " orig=%02" PRIx8 "",
+ LOG_ERROR("%s readback=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
__func__, readback, *bp->orig_instr);
return ERROR_FAIL;
}
addto = addto->next;
addto->next = new_patch;
}
- LOG_USER("%s software breakpoint %d set at 0x%08" PRIx32,
+ LOG_USER("%s software breakpoint %" PRIu32 " set at " TARGET_ADDR_FMT,
__func__, bp->unique_id, bp->address);
return ERROR_OK;
}
static int unset_swbp(struct target *t, struct breakpoint *bp)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("id %d", bp->unique_id);
- uint32_t physaddr;
+ LOG_DEBUG("id %" PRIx32, bp->unique_id);
+ target_addr_t physaddr;
uint8_t current_instr;
/* check that user program has not modified breakpoint instruction */
- if (calcaddr_pyhsfromlin(t, bp->address, &physaddr) != ERROR_OK)
+ if (calcaddr_physfromlin(t, bp->address, &physaddr) != ERROR_OK)
return ERROR_FAIL;
if (read_phys_mem(t, physaddr, 1, 1, ¤t_instr))
return ERROR_FAIL;
if (write_phys_mem(t, physaddr, 1, 1, bp->orig_instr))
return ERROR_FAIL;
} else {
- LOG_ERROR("%s software breakpoint remove error at 0x%08" PRIx32 ", check memory",
+ LOG_ERROR("%s software breakpoint remove error at " TARGET_ADDR_FMT ", check memory",
__func__, bp->address);
- LOG_ERROR("%s current=%02" PRIx8 " orig=%02" PRIx8 "",
+ LOG_ERROR("%s current=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
__func__, current_instr, *bp->orig_instr);
return ERROR_FAIL;
}
}
}
- LOG_USER("%s software breakpoint %d removed from 0x%08" PRIx32,
+ LOG_USER("%s software breakpoint %" PRIu32 " removed from " TARGET_ADDR_FMT,
__func__, bp->unique_id, bp->address);
return ERROR_OK;
}
{
int error = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
- LOG_DEBUG("type=%d, addr=%08" PRIx32, bp->type, bp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (bp->set) {
LOG_ERROR("breakpoint already set");
return error;
if (bp->type == BKPT_HARD) {
error = set_hwbp(t, bp);
if (error != ERROR_OK) {
- LOG_ERROR("%s error setting hardware breakpoint at 0x%08" PRIx32,
+ LOG_ERROR("%s error setting hardware breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return error;
}
if (x86_32->sw_bpts_supported(t)) {
error = set_swbp(t, bp);
if (error != ERROR_OK) {
- LOG_ERROR("%s error setting software breakpoint at 0x%08" PRIx32,
+ LOG_ERROR("%s error setting software breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return error;
}
} else {
LOG_ERROR("%s core doesn't support SW breakpoints", __func__);
- error = ERROR_FAIL;
return ERROR_FAIL;
}
}
static int unset_breakpoint(struct target *t, struct breakpoint *bp)
{
- LOG_DEBUG("type=%d, addr=%08" PRIx32, bp->type, bp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (!bp->set) {
LOG_WARNING("breakpoint not set");
return ERROR_OK;
if (bp->type == BKPT_HARD) {
if (unset_hwbp(t, bp) != ERROR_OK) {
- LOG_ERROR("%s error removing hardware breakpoint at 0x%08" PRIx32,
+ LOG_ERROR("%s error removing hardware breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return ERROR_FAIL;
}
} else {
if (unset_swbp(t, bp) != ERROR_OK) {
- LOG_ERROR("%s error removing software breakpoint at 0x%08" PRIx32,
+ LOG_ERROR("%s error removing software breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return ERROR_FAIL;
}
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
int wp_num = 0;
- LOG_DEBUG("type=%d, addr=%08" PRIx32, wp->rw, wp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);
if (wp->set) {
LOG_ERROR("%s watchpoint already set", __func__);
wp->set = wp_num + 1;
debug_reg_list[wp_num].used = 1;
debug_reg_list[wp_num].bp_value = wp->address;
- LOG_USER("'%s' watchpoint %d set at 0x%08" PRIx32 " with length %d (hwreg=%d)",
+ LOG_USER("'%s' watchpoint %d set at " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ?
"write" : wp->rw == WPT_ACCESS ? "access" : "?",
wp->unique_id, wp->address, wp->length, wp_num);
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
- LOG_DEBUG("type=%d, addr=%08" PRIx32, wp->rw, wp->address);
+ LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);
if (!wp->set) {
LOG_WARNING("watchpoint not set");
return ERROR_OK;
debug_reg_list[wp_num].bp_value = 0;
wp->set = 0;
- LOG_USER("'%s' watchpoint %d removed from 0x%08" PRIx32 " with length %d (hwreg=%d)",
+ LOG_USER("'%s' watchpoint %d removed from " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ?
"write" : wp->rw == WPT_ACCESS ? "access" : "?",
wp->unique_id, wp->address, wp->length, wp_num);
return ERROR_OK;
}
+/* after reset breakpoints and watchpoints in memory are not valid anymore and
+ * debug registers are cleared.
+ * we can't afford to remove sw breakpoints using the default methods as the
+ * memory doesn't have the same layout yet and an access might crash the target,
+ * so we just clear the openocd breakpoints structures.
+ */
+void x86_32_common_reset_breakpoints_watchpoints(struct target *t)
+{
+ struct x86_32_common *x86_32 = target_to_x86_32(t);
+ struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
+ struct breakpoint *next_b;
+ struct watchpoint *next_w;
+
+ while (t->breakpoints) {
+ next_b = t->breakpoints->next;
+ free(t->breakpoints->orig_instr);
+ free(t->breakpoints);
+ t->breakpoints = next_b;
+ }
+
+ while (t->watchpoints) {
+ next_w = t->watchpoints->next;
+ free(t->watchpoints);
+ t->watchpoints = next_w;
+ }
+
+ for (int i = 0; i < x86_32->num_hw_bpoints; i++) {
+ debug_reg_list[i].used = 0;
+ debug_reg_list[i].bp_value = 0;
+ }
+}
+
static int read_hw_reg_to_cache(struct target *t, int num)
{
uint32_t reg_value;
}
/* x86 32 commands */
-static void handle_iod_output(struct command_context *cmd_ctx,
+static void handle_iod_output(struct command_invocation *cmd,
struct target *target, uint32_t address, unsigned size,
unsigned count, const uint8_t *buffer)
{
value_fmt, value);
if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
- command_print(cmd_ctx, "%s", output);
+ command_print(cmd, "%s", output);
output_len = 0;
}
}
uint32_t address;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
if (address > 0xffff) {
- LOG_ERROR("%s IA-32 I/O space is 2^16, %08" PRIx32 " exceeds max", __func__, address);
+ LOG_ERROR("%s IA-32 I/O space is 2^16, 0x%08" PRIx32 " exceeds max", __func__, address);
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct target *target = get_current_target(CMD_CTX);
int retval = x86_32_common_read_io(target, address, size, buffer);
if (ERROR_OK == retval)
- handle_iod_output(CMD_CTX, target, address, size, count, buffer);
+ handle_iod_output(CMD, target, address, size, count, buffer);
free(buffer);
return retval;
}
/* value */
uint32_t b)
{
- LOG_DEBUG("address=%08X, data_size=%d, b=%08X",
+ LOG_DEBUG("address=0x%08" PRIx32 ", data_size=%u, b=0x%08" PRIx32,
address, data_size, b);
uint8_t target_buf[data_size];
switch (data_size) {