+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright(c) 2013 Intel Corporation.
*
* Julien Carreno (julien.carreno@intel.com)
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
*reg_list_size = x86_32->cache->num_regs;
LOG_DEBUG("num_regs=%d, reg_class=%d", (*reg_list_size), reg_class);
*reg_list = malloc(sizeof(struct reg *) * (*reg_list_size));
- if (*reg_list == NULL) {
+ if (!*reg_list) {
LOG_ERROR("%s out of memory", __func__);
return ERROR_FAIL;
}
x86_32->num_hw_bpoints = MAX_DEBUG_REGS;
x86_32->hw_break_list = calloc(x86_32->num_hw_bpoints,
sizeof(struct x86_32_dbg_reg));
- if (x86_32->hw_break_list == NULL) {
+ if (!x86_32->hw_break_list) {
LOG_ERROR("%s out of memory", __func__);
return ERROR_FAIL;
}
* with the original instructions again.
*/
struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list;
- while (iter != NULL) {
+ while (iter) {
if (iter->physaddr >= phys_address && iter->physaddr < phys_address+(size*count)) {
uint32_t offset = iter->physaddr - phys_address;
buffer[offset] = iter->orig_byte;
LOG_ERROR("%s invalid read size", __func__);
break;
}
+ if (retval != ERROR_OK)
+ break;
}
/* restore CR0.PG bit if needed (regardless of retval) */
if (pg_disabled) {
- retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK) {
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
LOG_ERROR("%s could not enable paging", __func__);
- return retval;
+ return retval2;
}
- pg_disabled = true;
}
/* TODO: After reading memory from target, we must replace
* software breakpoints with the original instructions again.
* breakpoint instruction.
*/
newbuffer = malloc(size*count);
- if (newbuffer == NULL) {
+ if (!newbuffer) {
LOG_ERROR("%s out of memory", __func__);
return ERROR_FAIL;
}
memcpy(newbuffer, buffer, size*count);
struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list;
- while (iter != NULL) {
+ while (iter) {
if (iter->physaddr >= phys_address && iter->physaddr < phys_address+(size*count)) {
uint32_t offset = iter->physaddr - phys_address;
newbuffer[offset] = SW_BP_OPCODE;
/* update the breakpoint */
struct breakpoint *pbiter = t->breakpoints;
- while (pbiter != NULL && pbiter->unique_id != iter->swbp_unique_id)
+ while (pbiter && pbiter->unique_id != iter->swbp_unique_id)
pbiter = pbiter->next;
if (pbiter)
pbiter->orig_instr[0] = buffer[offset];
break;
}
+ if (retval != ERROR_OK)
+ return retval;
+
/* read_hw_reg() will write to 4 bytes (uint32_t)
* Watch out, the buffer passed into read_mem() might be 1 or 2 bytes.
*/
LOG_ERROR("%s invalid write mem size", __func__);
return ERROR_FAIL;
}
+
+ if (retval != ERROR_OK)
+ return retval;
+
retval = x86_32->transaction_status(t);
if (retval != ERROR_OK) {
LOG_ERROR("%s error on mem write", __func__);
{
uint8_t entry_buffer[8];
- if (physaddr == NULL || t == NULL)
+ if (!physaddr || !t)
return ERROR_FAIL;
struct x86_32_common *x86_32 = target_to_x86_32(t);
}
uint32_t cr4 = buf_get_u32(x86_32->cache->reg_list[CR4].value, 0, 32);
- bool isPAE = cr4 & 0x00000020; /* PAE - Physical Address Extension */
+ bool is_pae = cr4 & 0x00000020; /* PAE - Physical Address Extension */
uint32_t cr3 = buf_get_u32(x86_32->cache->reg_list[CR3].value, 0, 32);
- if (isPAE) {
+ if (is_pae) {
uint32_t pdpt_base = cr3 & 0xFFFFF000; /* lower 12 bits of CR3 must always be 0 */
uint32_t pdpt_index = (addr & 0xC0000000) >> 30; /* A[31:30] index to PDPT */
uint32_t pdpt_addr = pdpt_base + (8 * pdpt_index);
&& x86_32_common_read_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to read memory from physical address " TARGET_ADDR_FMT,
__func__, physaddr);
- retval = ERROR_FAIL;
}
/* restore PG bit if it was cleared prior (regardless of retval) */
retval = x86_32->enable_paging(t);
&& x86_32_common_write_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to write memory to physical address " TARGET_ADDR_FMT,
__func__, physaddr);
- retval = ERROR_FAIL;
}
/* restore PG bit if it was cleared prior (regardless of retval) */
retval = x86_32->enable_paging(t);
LOG_ERROR("%s invalid read io size", __func__);
return ERROR_FAIL;
}
+
/* restore CR0.PG bit if needed */
if (pg_disabled) {
- retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK) {
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
LOG_ERROR("%s could not enable paging", __func__);
- return retval;
+ return retval2;
}
- pg_disabled = false;
}
+
+ if (retval != ERROR_OK)
+ return retval;
+
uint32_t regval = 0;
retval = x86_32->read_hw_reg(t, EAX, ®val, 0);
if (retval != ERROR_OK) {
LOG_ERROR("%s invalid write io size", __func__);
return ERROR_FAIL;
}
+
/* restore CR0.PG bit if needed */
if (pg_disabled) {
- retval = x86_32->enable_paging(t);
- if (retval != ERROR_OK) {
+ int retval2 = x86_32->enable_paging(t);
+ if (retval2 != ERROR_OK) {
LOG_ERROR("%s could not enable paging", __func__);
- return retval;
+ return retval2;
}
- pg_disabled = false;
}
+
+ if (retval != ERROR_OK)
+ return retval;
+
retval = x86_32->transaction_status(t);
if (retval != ERROR_OK) {
LOG_ERROR("%s error on io write", __func__);
{
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
- if (wp->set)
+ if (wp->is_set)
unset_watchpoint(t, wp);
return ERROR_OK;
}
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
- if (bp->set)
+ if (bp->is_set)
unset_breakpoint(t, bp);
return ERROR_OK;
* when we exit PM
*/
buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, address);
- x86_32->cache->reg_list[bp_num+DR0].dirty = 1;
- x86_32->cache->reg_list[bp_num+DR0].valid = 1;
+ x86_32->cache->reg_list[bp_num+DR0].dirty = true;
+ x86_32->cache->reg_list[bp_num+DR0].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6);
- x86_32->cache->reg_list[DR6].dirty = 1;
- x86_32->cache->reg_list[DR6].valid = 1;
+ x86_32->cache->reg_list[DR6].dirty = true;
+ x86_32->cache->reg_list[DR6].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7);
- x86_32->cache->reg_list[DR7].dirty = 1;
- x86_32->cache->reg_list[DR7].valid = 1;
+ x86_32->cache->reg_list[DR7].dirty = true;
+ x86_32->cache->reg_list[DR7].valid = true;
return ERROR_OK;
}
* when we exit PM
*/
buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, 0);
- x86_32->cache->reg_list[bp_num+DR0].dirty = 1;
- x86_32->cache->reg_list[bp_num+DR0].valid = 1;
+ x86_32->cache->reg_list[bp_num+DR0].dirty = true;
+ x86_32->cache->reg_list[bp_num+DR0].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6);
- x86_32->cache->reg_list[DR6].dirty = 1;
- x86_32->cache->reg_list[DR6].valid = 1;
+ x86_32->cache->reg_list[DR6].dirty = true;
+ x86_32->cache->reg_list[DR6].valid = true;
buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7);
- x86_32->cache->reg_list[DR7].dirty = 1;
- x86_32->cache->reg_list[DR7].valid = 1;
+ x86_32->cache->reg_list[DR7].dirty = true;
+ x86_32->cache->reg_list[DR7].valid = true;
return ERROR_OK;
}
}
if (set_debug_regs(t, bp->address, hwbp_num, DR7_BP_EXECUTE, 1) != ERROR_OK)
return ERROR_FAIL;
- bp->set = hwbp_num + 1;
+ breakpoint_hw_set(bp, hwbp_num);
debug_reg_list[hwbp_num].used = 1;
debug_reg_list[hwbp_num].bp_value = bp->address;
LOG_USER("%s hardware breakpoint %" PRIu32 " set at 0x%08" PRIx32 " (hwreg=%" PRIu8 ")", __func__,
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
- int hwbp_num = bp->set - 1;
+ int hwbp_num = bp->number;
- if ((hwbp_num < 0) || (hwbp_num >= x86_32->num_hw_bpoints)) {
+ if (hwbp_num >= x86_32->num_hw_bpoints) {
LOG_ERROR("%s invalid breakpoint number=%d, bpid=%" PRIu32,
__func__, hwbp_num, bp->unique_id);
return ERROR_OK;
__func__, readback, *bp->orig_instr);
return ERROR_FAIL;
}
- bp->set = SW_BP_OPCODE; /* just non 0 */
+ bp->is_set = true;
/* add the memory patch */
struct swbp_mem_patch *new_patch = malloc(sizeof(struct swbp_mem_patch));
- if (new_patch == NULL) {
+ if (!new_patch) {
LOG_ERROR("%s out of memory", __func__);
return ERROR_FAIL;
}
new_patch->swbp_unique_id = bp->unique_id;
struct swbp_mem_patch *addto = x86_32->swbbp_mem_patch_list;
- if (addto == NULL)
+ if (!addto)
x86_32->swbbp_mem_patch_list = new_patch;
else {
- while (addto->next != NULL)
+ while (addto->next)
addto = addto->next;
addto->next = new_patch;
}
/* remove from patch */
struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list;
- if (iter != NULL) {
+ if (iter) {
if (iter->swbp_unique_id == bp->unique_id) {
/* it's the first item */
x86_32->swbbp_mem_patch_list = iter->next;
free(iter);
} else {
- while (iter->next != NULL && iter->next->swbp_unique_id != bp->unique_id)
+ while (iter->next && iter->next->swbp_unique_id != bp->unique_id)
iter = iter->next;
- if (iter->next != NULL) {
+ if (iter->next) {
/* it's the next one */
struct swbp_mem_patch *freeme = iter->next;
iter->next = iter->next->next;
int error = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
- if (bp->set) {
+ if (bp->is_set) {
LOG_ERROR("breakpoint already set");
return error;
}
}
} else {
LOG_ERROR("%s core doesn't support SW breakpoints", __func__);
- error = ERROR_FAIL;
return ERROR_FAIL;
}
}
static int unset_breakpoint(struct target *t, struct breakpoint *bp)
{
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
- if (!bp->set) {
+ if (!bp->is_set) {
LOG_WARNING("breakpoint not set");
return ERROR_OK;
}
return ERROR_FAIL;
}
}
- bp->set = 0;
+ bp->is_set = false;
return ERROR_OK;
}
int wp_num = 0;
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);
- if (wp->set) {
+ if (wp->is_set) {
LOG_ERROR("%s watchpoint already set", __func__);
return ERROR_OK;
}
LOG_ERROR("%s only 'access' or 'write' watchpoints are supported", __func__);
break;
}
- wp->set = wp_num + 1;
+ watchpoint_set(wp, wp_num);
debug_reg_list[wp_num].used = 1;
debug_reg_list[wp_num].bp_value = wp->address;
LOG_USER("'%s' watchpoint %d set at " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);
- if (!wp->set) {
+ if (!wp->is_set) {
LOG_WARNING("watchpoint not set");
return ERROR_OK;
}
- int wp_num = wp->set - 1;
- if ((wp_num < 0) || (wp_num >= x86_32->num_hw_bpoints)) {
+ int wp_num = wp->number;
+ if (wp_num >= x86_32->num_hw_bpoints) {
LOG_DEBUG("Invalid FP Comparator number in watchpoint");
return ERROR_OK;
}
debug_reg_list[wp_num].used = 0;
debug_reg_list[wp_num].bp_value = 0;
- wp->set = 0;
+ wp->is_set = false;
LOG_USER("'%s' watchpoint %d removed from " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ?
return ERROR_OK;
}
+/* after reset breakpoints and watchpoints in memory are not valid anymore and
+ * debug registers are cleared.
+ * we can't afford to remove sw breakpoints using the default methods as the
+ * memory doesn't have the same layout yet and an access might crash the target,
+ * so we just clear the openocd breakpoints structures.
+ */
+void x86_32_common_reset_breakpoints_watchpoints(struct target *t)
+{
+ struct x86_32_common *x86_32 = target_to_x86_32(t);
+ struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
+ struct breakpoint *next_b;
+ struct watchpoint *next_w;
+
+ while (t->breakpoints) {
+ next_b = t->breakpoints->next;
+ free(t->breakpoints->orig_instr);
+ free(t->breakpoints);
+ t->breakpoints = next_b;
+ }
+
+ while (t->watchpoints) {
+ next_w = t->watchpoints->next;
+ free(t->watchpoints);
+ t->watchpoints = next_w;
+ }
+
+ for (int i = 0; i < x86_32->num_hw_bpoints; i++) {
+ debug_reg_list[i].used = 0;
+ debug_reg_list[i].bp_value = 0;
+ }
+}
+
static int read_hw_reg_to_cache(struct target *t, int num)
{
uint32_t reg_value;
}
/* x86 32 commands */
-static void handle_iod_output(struct command_context *cmd_ctx,
+static void handle_iod_output(struct command_invocation *cmd,
struct target *target, uint32_t address, unsigned size,
unsigned count, const uint8_t *buffer)
{
value_fmt, value);
if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
- command_print(cmd_ctx, "%s", output);
+ command_print(cmd, "%s", output);
output_len = 0;
}
}
uint8_t *buffer = calloc(count, size);
struct target *target = get_current_target(CMD_CTX);
int retval = x86_32_common_read_io(target, address, size, buffer);
- if (ERROR_OK == retval)
- handle_iod_output(CMD_CTX, target, address, size, count, buffer);
+ if (retval == ERROR_OK)
+ handle_iod_output(CMD, target, address, size, count, buffer);
free(buffer);
return retval;
}