jtag newtap change & huge manual update

[fw/openocd] / src / target / target / stm32stick.cfg

diff --git a/src/target/target/stm32stick.cfg b/src/target/target/stm32stick.cfg
index 00964ab59199bc420c677f31281c3fc615606db7..bb297dd77b94ac589b6f864c7afb8f6e01715755 100644 (file)
--- a/src/target/target/stm32stick.cfg
+++ b/src/target/target/stm32stick.cfg
@@ -1,5 +1,17 @@
 # Hitex stm32 performance stick
 
+if { [info exists CHIPNAME] } {        
+   set  _CHIPNAME $CHIPNAME    
+} else {        
+   set  _CHIPNAME stm32_hitex
+}
+
+if { [info exists ENDIAN] } {  
+   set  _ENDIAN $ENDIAN    
+} else {        
+   set  _ENDIAN little
+}
+
 # set jtag speed
 jtag_khz 500
 
@@ -10,16 +22,28 @@ jtag_ntrst_delay 100
 reset_config trst_and_srst
 
 #jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-jtag_device 4 0x1 0xf 0xe
+# The CPU
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # See STM Document RM0008
+  # Section 26.6.3
+   set _CPUTAPID 0x3ba00477
+}
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
+
+# The boundery scan register, leave the "expected-id" undefined.
+jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1e 
+
+# What is this? It must be some extra chip on the stm32stick...
+jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0x0f
 
-target create target0 cortex_m3 -endian little -chain-position 0
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
-[new_target_name] configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
 
-#flash bank str7x <base> <size> 0 0 <target#> <variant>
+#
 flash bank stm32x 0 0 0 0 0
 
 # For more information about the configuration files, take a look at: