Audit and remove redundant uses of replacements.h in the tree.

[fw/openocd] / src / target / target / lpc2378.cfg

diff --git a/src/target/target/lpc2378.cfg b/src/target/target/lpc2378.cfg
index 386fae072e1966b4434ede4d6154540814d2a48b..16232383e261a6ea4e3baadba8a2f8ae1f3b8810 100644 (file)
--- a/src/target/target/lpc2378.cfg
+++ b/src/target/target/lpc2378.cfg
@@ -1,49 +1,49 @@
-# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator\r
-\r
-if { [info exists CHIPNAME] } {\r
-       set  _CHIPNAME $CHIPNAME\r
-} else {\r
-       set  _CHIPNAME lpc2378\r
-}\r
-\r
-if { [info exists ENDIAN] } {\r
-       set  _ENDIAN $ENDIAN\r
-} else {\r
-       set  _ENDIAN little\r
-}\r
-\r
-if { [info exists CPUTAPID ] } {\r
-       set _CPUTAPID $CPUTAPID\r
-} else {\r
-       set _CPUTAPID 0x4f1f0f0f\r
-}\r
-\r
-#delays on reset lines\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-# LPC2000 -> SRST causes TRST\r
-reset_config trst_and_srst srst_pulls_trst\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]\r
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4\r
-\r
-# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)\r
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0\r
-\r
-$_TARGETNAME configure -event reset-init {\r
-       # Force target into ARM state\r
-       soft_reset_halt\r
-       #do not remap 0x0000-0x0020 to anything but the flash\r
-       mwb 0xE01FC040 0x01\r
-}\r
-\r
-# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.\r
-# After reset the chip uses its internal 4MHz RC oscillator\r
-#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>\r
-flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum\r
-\r
-# 4MHz / 6 = 666kHz, so use 500\r
-jtag_khz 500\r
+# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator
+
+if { [info exists CHIPNAME] } {
+       set  _CHIPNAME $CHIPNAME
+} else {
+       set  _CHIPNAME lpc2378
+}
+
+if { [info exists ENDIAN] } {
+       set  _ENDIAN $ENDIAN
+} else {
+       set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+       set _CPUTAPID $CPUTAPID
+} else {
+       set _CPUTAPID 0x4f1f0f0f
+}
+
+#delays on reset lines
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+# LPC2000 -> SRST causes TRST
+reset_config trst_and_srst srst_pulls_trst
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+
+# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+       # Force target into ARM state
+       soft_reset_halt
+       #do not remap 0x0000-0x0020 to anything but the flash
+       mwb 0xE01FC040 0x01
+}
+
+# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
+# After reset the chip uses its internal 4MHz RC oscillator
+#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
+flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum
+
+# 4MHz / 6 = 666kHz, so use 500
+jtag_khz 500